ATtiny25 datasheet(123/196 Pages) ATMEL

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7598H–AVR–07/09

ATtiny25/45/85

The values described in Table 51 are typical values. However, due to the process variation the

temperature sensor output voltage varies from one chip to another. To be capable of achieving

more accurate results the temperature measurement can be calibrated in the application soft-

ware. The software calibration requires that a calibration value is measured and stored in a

be done utilizing the formula:

where V

TEMP is the ADC reading of the temperature sensor signal, k is a fixed coefficient and TOS

is the temperature sensor offset value determined and stored into EEPROM as a part of produc-

tion test.

18.7.5

ADC Multiplexer Selection Register – ADMUX

• Bit 7..6,4 – REFS2..REFS0: Voltage Reference Selection Bits

These bits select the voltage reference (V

REF) for the ADC, as shown in Table 18-3. If these bits

are changed during a conversion, the change will not go in effect until this conversion is

complete (ADIF in ADCSR is set). Whenever these bits are changed, the next conversion will

take 25 ADC clock cycles. If active channels are used, using V

CC or an external AREF higher

than (V

CC - 1V) as a voltage reference is not recommended, as this will affect the ADC accuracy.

• Bit 5 – ADLAR: ADC Left Adjust Result

The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.

Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the

ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-

sions. For a comple te description of this bit, see “The ADC Data Register – ADCL and ADCH”

on page 126.

Temperature

VTEMP TOS

⋅

Bit

765

432

REFS1

REFS0

ADLAR

REFS2

MUX3

MUX2

MUX1

MUX0

ADMUX

Read/Write

R/W

Initial Value

Table 18-3.

Voltage Reference Selections for ADC

REFS2

REFS1

REFS0

Voltage Reference (VREF) Selection

VCC used as Voltage Reference, disconnected from PB0 (AREF).

External Voltage Reference at PB0 (AREF) pin, Internal Voltage

Reference turned off.

Internal 1.1V Voltage Reference without external bypass capacitor,

disconnected from PB0 (AREF).

Internal 1.1V Voltage Reference with external bypass capacitor at

PB0 (AREF) pin.

Internal 2.56V Voltage Reference without external bypass

capacitor, disconnected from PB0 (AREF). (1)

The device requires a supply voltage of 3V in order to generate 2.56V reference voltage.

Internal 2.56V Voltage Reference with external bypass capacitor at

PB0 (AREF) pin.(1)

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