ATtiny25 datasheet(81/196 Pages) ATMEL

81 / 196 page

7598H–AVR–07/09

ATtiny25/45/85

14. Counter and Compare Units

Figure 14-1 shows the Timer/Counter1 prescaler that supports two clocking modes, a synchro-

nous clocking mode and an asynchronous clocking mode. The synchronous clocking mode uses

the system clock (CK) as the clock timebase and asynchronous mode uses the fast peripheral

clock (PCK) as the clock time base. The PCKE bit from the PLLCSR register enables the asyn-

chronous mode when it is set (‘1’).

Figure 14-1. Timer/Counter1 Prescaler

In the asynchronous clocking mode the clock selections are from PCK to PCK/16384 and stop,

and in the synchronous clocking mode the clock selections are from CK to CK/16384 and stop.

The clock options are described in Table 14-2 on page 84 and the Timer/Counter1 Control Reg-

ister, TCCR1. Setting the PSR1 bit in GTCCR register resets the prescaler. The PCKE bit in the

PLLCSR register enables the asynchronous mode. The frequency of the fast peripheral clock is

64 MHz (or 32 MHz in Low Speed Mode).

14.1

Timer/Counter1

The Timer/Counter1 general operation is described in the asynchronous mode and the opera-

tion in the synchronous mode is mentioned only if there are differences between these two

modes. Figure 14-2 shows Timer/Counter 1 synchronization register block diagram and syn-

chronization delays in between registers. Note that all clock gating details are not shown in the

figure. The Timer/Counter1 register values go through the internal synchronization registers,

which cause the input synchronization delay, before affecting the counter operation. The regis-

ters TCCR1, GTCCR, OCR1A, OCR1B, and OCR1C can be read back right after writing the

(OCF1A, OCF1B, and TOV1), because of the input and output synchronization.

The Timer/Counter1 features a high resolution and a high accuracy usage with the lower pres-

caling opportunities. It can also support two accurate, high speed, 8-bit Pulse Width Modulators

using clock speeds up to 64 MHz ( or 32 MHz in Low Speed Mode). In this mode,

Timer/Counter1 and the output compare registers serve as dual stand-alone PWMs with

non-overlapping non-inverted and inverted outputs. Refer to page 90 for a detailed description

on this function. Similarly, the high prescaling opportunities make this unit useful for lower speed

functions or exact timing functions with infrequent actions.

TIMER/COUNTER1 COUNT ENABLE

PSR1

CS10

CS11

CS12

PCK 64/32 MHz

CS13

14-BIT

T/C PRESCALER

PCKE

T1CK

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