ATtiny25 datasheet(27/196 Pages) ATMEL

27 / 196 page

7598H–AVR–07/09

ATtiny25/45/85

The CAL7 bit determines the range of operation for the oscillator. Setting this bit to 0 gives the

lowest frequency range, setting this bit to 1 gives the highest frequency range. The two fre-

quency ranges are overlapping, in other words a setting of OSCCAL = 0x7F gives a higher

frequency than OSCCAL = 0x80.

The CAL6..0 bits are used to tune the frequency within the selected range. A setting of 0x00

gives the lowest frequency in that range, and a setting of 0x7F gives the highest frequency in the

range. Incrementing CAL6..0 by 1 will give a frequency increment of less than 2% in the fre-

quency range 7.3 - 8.1 MHz.

Avoid changing the calibration value in large steps when calibrating the calibrated internal RC

Oscillator to ensure stable operation of the MCU. A variation in frequency of more than 2% from

one cycle to the next can lead to unpredicatble behavior. Changes in OSCCAL should not

exceed 0x20 for each calibration. It is required to ensure that the MCU is kept in Reset during

such changes in the clock frequency

6.7

External Clock

To drive the device from an external clock source, CLKI should be driven as shown in Figure

6-4. To run the device on an external clock, the CKSEL Fuses must be programmed to “00”.

Figure 6-4.

External Clock Drive Configuration

When this clock source is selected, start-up times are determined by the SUT Fuses as shown in

Table 6-9.

Table 6-8.

Internal RC Oscillator Frequency Range

OSCCAL Value

Min Frequency in Percentage of

Nominal Frequency

Max Frequency in Percentage of

Nominal Frequency

0x00

50%

100%

0x3F

75%

150%

0x7F

100%

200%

Table 6-9.

Start-up Times for the External Clock Selection

SUT1..0

Start-up Time from

Power-down and Power-save

Additional Delay from

Reset

Recommended Usage

6 CK

14CK

BOD enabled

6 CK

14CK + 4 ms

Fast rising power

6 CK

14CK + 64 ms

Slowly rising power

Reserved

EXTERNAL

CLOCK

SIGNAL

CLKI

GND

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