AT697F datasheet(17/155 Pages) ATMEL

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7703C–AERO–6/09

AT697F ADVANCE INFORMATION

Figure 3. Overlapping Windows

globals

locals

outs

ins

cwp

The Window Invalid Mask register (WIM) is controlled by supervisor software and is used by

hardware to determine whether a window overflow or underflow trap is to be generated by a

SAVE, RESTORE, or RETT instruction.

When a SAVE, RESTORE, or RETT instruction is executed, the current value of the CWP is

compared against the WIM register. If the SAVE, RESTORE, or RETT instruction would cause

the CWP to point to an “invalid” register set, a window_overflow or window_underflow trap is

caused.

To prevent erroneous operations from SEU errors in the main register file, each word is pro-

tected with a 7-bit EDAC checksum. The EDAC checksums are checked when the register is

used as operand in an instruction. Any single-bit error is corrected and written back to the regis-

ter file before the instruction is executed. If an un-correctable error is detected, a register

hardware error trap (trap 0x20) is generated.

The protection can be enabled/disabled by programming the asr16 di bit from register file pro-

tection control register. By setting the asr16 te bit, errors can be inserted in the register file to

test the protection function. When the asr16 te bit is set, the register checksum is combined

with the asr16 tcb field before being written to the register file.

Due to the presence of the two dual-port rams for register file implementation, the following rules

apply to the error injection test process.

•

Test checkbits TCB[2:0] is Xored with checkbit[6:4] corresponding to the %rs1 operand.

•

Test checkbits TCB[5:3] is Xored with checkbit[6:4] corresponding to the %rs2 operand.

Here is a simple example for the test of a single error in register file %rs1

! 0x32 =

! register file test enable

! tcb[2:0] = 0x4

! tcb[5:3] = 0x1

mov 0x32, %l1

mov %l1, %asr16

! clear %l3

! => write 0x0 to %l3

forces 0x08 as checkbit for %l3 (error insertion in %rs1 dual-port ram)

mov %g0, %l3

! disable EDAC test mode

mov %g0, %asr16

! access to %l3 as %rs1 operand

! => single error detection and correction

add %l3,%l2,%l1

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