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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT697F датащи(PDF) 70 Page - ATMEL Corporation |
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AT697F датащи(HTML) 70 Page - ATMEL Corporation |
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70 / 155 page  70 7703C–AERO–6/09 AT697F ADVANCE INFORMATION It is used to test connections between components at board level. Components output pins are controlled by boundary scan register during Capture DR on the rising edge of TCK. SAMPLE/PRELOAD This instruction is binary coded "001" It is used to get a snapshot of the normal operation by sampling I/O states during Capture DR on the rising edge of TCK. It allows also to preload a value on the output latches during Update DR on falling edge of TCK. It do not modify system behaviour. IDCODE This instruction is binary coded "111" Value of the IDCODE is loaded during Capture DR. Test Data Registers The following data registers are supported in the AT697 TAP: Bypass Register Bypass register containing a single shift register stage is connected between TDI and TDO. Figure 45. Bypass Register Cell D from TDI to TDO Clock DR Shift DR & Device ID register Device ID register is a read only 32-bit register. It is connected between TDI and TDO. Figure 46. Device ID Register Vers. Part ID Manufacturer’s ID Const. 0 1 11 12 27 28 31 0001 1011 . 0110 . 0100 . 0101 000 . 0101 . 1000 1 ID. register value: 0x 1b64 50b1 Field Definitions: [31:28]: Vers - Version number - 0x1 [27:12]: Part ID - Represent part number as assigned by Vendor- 0x b645 [11:01]: Manufacturer’s ID - Represent manufacturer’s ID as per JEDEC - 0x 058 [0]: Const - Constant tied to logic ’1’. |
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