UPSD3233 datasheet(108/170 Pages) STMICROELECTRONICS

108 / 170 page

uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV

108/170

Reset Flash. The Reset Flash instruction con-

sists

one

WRITE

cycle

(see

Table

85., page 101). It can also be optionally preceded

by the standard two WRITE decoding cycles (writ-

ing AAh to 555h and 55h to AAAh). It must be ex-

ecuted after:

–

Reading the Flash Protection Status or Flash

–

An Error condition has occurred (and the

device has set the Error Flag Bit (DQ5) to '1'

during a Flash memory Program or Erase

cycle.

The Reset Flash instruction puts the Flash memo-

ry back into normal READ Mode. If an Error condi-

tion has occurred (and the device has set the Error

Flag Bit (DQ5) to '1' the Flash memory is put back

into normal READ Mode within 25

µs of the Reset

Flash instruction having been issued. The Reset

Flash instruction is ignored when it is issued dur-

ing a Program or Bulk Erase cycle of the Flash

memory. The Reset Flash instruction aborts any

on-going Sector Erase cycle, and returns the

Flash memory to the normal READ Mode within

µs.

Reset (RESET) Signal. A pulse on Reset (RE-

SET) aborts any cycle that is in progress, and re-

sets the Flash memory to the READ Mode. When

the reset occurs during a Program or Erase cycle,

the Flash memory takes up to 25

µs to return to the

READ Mode. It is recommended that the Reset

(RESET) pulse (except for Power-on RESET, as

described in RESET TIMING AND DEVICE STA-

TUS AT RESET, page 132) be at least 25

µs so

that the Flash memory is always ready for the

MCU to retreive the bootstrap instructions after the

reset cycle is complete.

SRAM

The SRAM is enabled when SRAM Select (RS0)

from the DPLD is High. SRAM Select (RS0) can

contain up to two product terms, allowing flexible

memory mapping.

The SRAM can be backed up using an external

battery. The external battery should be connected

to Voltage Stand-by (VSTBY, PC2). If you have an

external battery connected to the uPSD3200, the

contents of the SRAM are retained in the event of

a power loss. The contents of the SRAM are re-

tained so long as the battery voltage remains at 2V

or greater. If the supply voltage falls below the bat-

tery voltage, an internal power switch-over to the

battery occurs.

PC4 can be configured as an output that indicates

when power is being drawn from the external bat-

tery. Battery-on Indicator (VBATON, PC4) is High

with the supply voltage falls below the battery volt-

age and the battery on Voltage Stand-by (VSTBY,

PC2) is supplying power to the internal SRAM.

SRAM Select (RS0), Voltage Stand-by (VSTBY,

PC2) and Battery-on Indicator (VBATON, PC4) are

all configured using PSDsoft Express Configura-

tion.

Sector Select and SRAM Select

Sector Select (FS0-FS7, CSBOOT0-CSBOOT3)

and SRAM Select (RS0) are all outputs of the

DPLD. They are setup by writing equations for

them in PSDsoft Express. The following rules ap-

ply to the equations for these signals:

Primary Flash memory and secondary Flash

memory Sector Select signals must

not be

larger than the physical sector size.

Any primary Flash memory sector must

not be

mapped in the same memory space as

another Flash memory sector.

A secondary Flash memory sector must

not be

mapped in the same memory space as

another secondary Flash memory sector.

SRAM, I/O, and Peripheral I/O spaces must

not overlap.

A secondary Flash memory sector

may

overlap a primary Flash memory sector. In

case of overlap, priority is given to the

secondary Flash memory sector.

SRAM, I/O, and Peripheral I/O spaces

may

overlap any other memory sector. Priority is

given to the SRAM, I/O, or Peripheral I/O.

UPSD3233 датащи(PDF) 108 Page - STMicroelectronics

UPSD3233 датащи(HTML) 108 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL