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M66596FP датащи(PDF) 102 Page - Renesas Technology Corp |
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M66596FP датащи(HTML) 102 Page - Renesas Technology Corp |
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102 / 131 page ![]() M66596FP/WG rev .1.00 2006.3.14 page 102 of 127 4.5 Measurement circuit 4.5.1 Pins except for USB buffer block CL RL=1k Ω SW2 SW1 CL Elements to be measured P.G. RL=1k Ω VDD VDD input tdis(CTRL(LZ)) tdis(CTRL(HZ)) ta(CTRL(ZL)) ta(CTRL(ZH)) SW2 SW1 (1) Input pulse level : 0 ~ 3.3V, 0 ~ 1.8V Input pulse rise/fall time : tr,tf=3ns Input timing standard voltage : VIF/2 Output timing judge voltage : VIF/2 (The tdis (LZ) is judged by 10% of the output amplitude and the tdis (HZ) by 90% of the output amplitude.) (2)The electrostatic capacity CL includes the stray capacitance of the wire connection and the input capacitance of the probe. 50 Ω GND D15-0, SD7-0, DEND0_N, DEND1_N other output closed closed closed closed open open open open item 4.5.2 USB buffer block (Full-Speed) CL D+ RL=15K Ω CL D- RL=15K Ω VDD GND Elements to be measured (1) The tr and tf are judged by the transition time of the 10% amplitude point and 90% amplitude point respectively. (2) The electrostatic capacity CL includes the stray capacitance of the wire connection and the input capacitance of the probe. DM DP (3) The resistor RL exists only when peripheral mode. 4.5.3 USB buffer block (Hi-Speed) CL D+ RL=45 Ω CL D- RL=45 Ω VDD GND Elements to be m easured DM DP (1) The tr and tf are judged by the transition time of the 10% amplitude point and 90% amplitude point respectively. (2) The electrostatic capacity CL includes the stray capacitance of the wire connection and the input capacitance of the probe. |
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