DSP56F826 datasheet(10/60 Pages) FREESCALE

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56F827 Technical Data, Rev. 12

Freescale Semiconductor

2.2 Signals and Package Information

All inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are always

enabled. Exceptions:

1. When a pin is owned by GPIO, then the pull-up may be disabled under software control.

2. TCK has a weak pull-down circuit always active.

Table 2-2 56F827 Signal and Package Information for the 128 Pin LQFP

Signal Name

Pin No.

Type

Description

VDD

116

VDD

Power—These pins provide power to the internal structures of the chip, and

are generally connected to a 2.5V supply.

VDD

VDDA

Analog Power—This pin is a dedicated power pin for the analog portion of the

chip and should be connected to a low-noise 3.3V supply.

VDDA_ADC

VDDA

Analog Power—This pin is a dedicated power pin for the analog portion of the

ADC module and should be connected to a low-noise 3.3V supply.

VDDIO

113

VDDIO

Power In/Out—These pins provide power to the I/O structures of the chip, and

are generally connected to a 3.3V supply.

VDDIO

4VDDIO

VSS

115

VSS

GND—These pins provide grounding for the internal structures of the chip. All

should be attached to VSS.

VSS

VSSA

Analog Ground—This pin supplies an analog ground.

VSSA_ADC

VSSA

Analog Ground—This pin is a dedicated ground pin for the analog portion of

the ADC module.

VSSIO

114

VSSIO

GND In/Out—These pins provide grounding for the I/O ring on the chip.

All should be attached to VSS.

VSSIO

5VSSIO

TCS

Input/Output

(Schmitt)

TCS—This pin is reserved for factory use. It must be tied to VSS for normal

use. In block diagrams, this pin is considered an additional VSS.

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