DSP56F826 datasheet(42/60 Pages) FREESCALE

номер детали	DSP56F826

подробное описание детали	16-bit Digital Signal Controllers

PDF	60 Pages

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56F827 Technical Data, Rev. 12

Freescale Semiconductor

3.10 Analog-to-Digital Converter (ADC) Timing

Table 3-13 ADC Characteristics

Characteristic

Symbol

Min

Typ

Max

Unit

ADC Input voltage

VADCIN

0—

VREFHI1

1. VREF must be equal to or less than VDDA and must be greater than 2.7V. For optimal ADC performance, set VREF to

VDDA-0.3V.

Resolution

RES

—

Bits

Integral Non-Linearity2

INL

—

+/- 1

+/- 3

LSB3

Differential Non-Linearity

DNL

—

+/- 0.4

+/- 1

LSB3

Monotonicity

GUARANTEED

ADC internal clock4

fADIC

0.5

—

2.5

MHz

Conversion range

RAD

VREFLO

—VREFHI

Power-up time

tADPU

—25

—

Conversion time

tADC

—6

—

tAIC cycles5

Sample time

tADS

—1

—

tAIC cycles5

Input capacitance

CADI

—5

—

pF5

Gain Error (transfer gain)4

EGAIN

0.95

1.00

1.10

—

Offset Voltage4

VOFFSET

-60

+15

+40

Total Harmonic Distortion4

THD

—

Effective Number of Bits4

ENOB

9.3

10.5

—

bit

Spurious Free Dynamic Range4

SFDR

—

Signal-to-Noise plus Distortion4

SINAD

—

ADC quiescent current

IADC

—

ADC quiescent current (power

down bit set high)

IADCPD

—

μA

VREF quiescent current

IVREF

—

VREF quiescent current (power

down bit set high)

IVREFPD

—

μA

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