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STM32H533CE датащи(PDF) 119 Page - STMicroelectronics |
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STM32H533CE датащи(HTML) 119 Page - STMicroelectronics |
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119 / 231 page ![]() DS14539 Rev 1 119/231 STM32H533xx Electrical characteristics 200 Figure 16. High-speed external clock source AC timing diagram Low-speed external user clock generated from an external source In bypass mode the LSE oscillator is switched off and the input pin is a standard GPIO. The external clock signal must respect the Table 40 in addition to Table 57. The external clock can be low-swing (analog) or digital. In case of a low-swing analog input clock, the clock squarer must be activated (refer to RM0481). ai17528b OSC_IN External STM32 clock source VHSEH tf(HSE) tW(HSE) IL 90 % 10 % THSE t tr(HSE) tW(HSE) fHSE_ext VHSEL Table 40. Low-speed external user clock characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fLSE_ext User external clock source frequency External digital/analog clock - 32.768 1000 kHz VLSEH Digital OSC32_IN input high-level voltage External digital clock 0.7 VDD -VDD V VLSEL Digital OSC32_IN input low-level voltage VSS -0.3 VDD tw(LSEH)/tw(LSEL) Digital OSC_IN input high or low time External digital clock 250 - - ns Visw_H Analog low-swing OSC_IN high-level voltage External analog low swing clock 0.6 - 1.225 V Visw_L Analog low-swing OSC_IN low-level voltage 0.35 - 0.8 ViswLSE (VLSEH -VLSEL) Analog low-swing OSC_IN peak-to-peak amplitude 0.5 - 0.875 DuCyLSE Analog low-swing OSC_IN duty cycle 45 50 55 % tr(LSE)/tf(LSE) Analog low-swing OSC_IN rise and fall times External analog low swing clock, 10% to 90% - 100 200 ns 1. Specified by design - Not tested in production. |
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