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ADC32RF44IRMPR датащи(PDF) 89 Page - Texas Instruments

номер детали ADC32RF44IRMPR
подробное описание детали  ADC32RF44 Dual-Channel, 14-Bit, 2.6-GSPS, Analog-to-Digital Converter
PDF  135 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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ADC32RF44IRMPR датащи(HTML) 89 Page - Texas Instruments

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ADC32RF44
www.ti.com
SBAS809A – FEBRUARY 2017 – REVISED MARCH 2017
Product Folder Links: ADC32RF44
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
9.5.11.5 Register 006h (address = 006h), JESD Digital Page
Figure 153. Register 006h
7
6
5
4
3
2
1
0
SCRAMBLE EN
0
0
0
0
0
0
0
R/W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 64. Register 006h Field Descriptions
Bit
Field
Type
Reset
Description
7
SCRAMBLE EN
R/W
0h
This bit is the scramble enable bit in the JESD204B interface.
0 = Scrambling disabled
1 = Scrambling enabled
6-0
0
W
0h
Must write 0
9.5.11.6 Register 007h (address = 007h), JESD Digital Page
Figure 154. Register 007h
7
6
5
4
3
2
1
0
0
0
0
FRAMES PER MULTIFRAME (K)
W-0h
W-0h
W-0h
R/W-0h
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Table 65. Register 007h Field Descriptions
Bit
Field
Type
Reset
Description
7-5
0
W
0h
Must write 0
4-0
FRAMES PER MULTIFRAME (K)
R/W
0h
These bits set the number of multiframes.
Actual K is the value in hex + 1 (that is, 0Fh is K = 16).



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