UPSD3422 datasheet(92/293 Pages) STMICROELECTRONICS

92 / 293 page

Standard 8032 timer/counters

uPSD34xx

92/293

20.6.1

Capture mode

In Capture Mode there are two options which are selected by the bit EXEN2 in T2CON.

Figure 28 on page 97 illustrates Capture mode.

If EXEN2 = 0, then Timer 2 is a 16-bit timer if C/T2 = 0, or it is a 16-bit counter if C/T2 = 1,

either of which sets the interrupt flag bit TF2 upon overflow.

If EXEN2 = 1, then Timer 2 still does the above, but with the added feature that a 1-to-0

transition at external input pin T2X causes the current value in the Timer 2 registers, TL2

and TH2, to be captured into Registers RCAP2L and RCAP2H, respectively. In addition, the

transition at T2X causes interrupt flag bit EXF2 in T2CON to be set. Either flag TF2 or EXF2

will generate an interrupt and the MCU must read both flags to determine the cause. Flags

TF2 and EXF2 are not automatically cleared by hardware, so the firmware servicing the

interrupt must clear the flag(s) upon exit of the interrupt service routine.

20.6.2

Auto-reload mode

In the Auto-reload Mode, there are again two options, which are selected by the bit EXEN2

in T2CON. Figure 29 on page 97 shows Auto-reload mode.

If EXEN2 = 0, then when Timer 2 counts up and rolls over from FFFFh it not only sets the

interrupt flag TF2, but also causes the Timer 2 registers to be reloaded with the 16-bit value

contained in Registers RCAP2L and RCAP2H, which are preset with firmware.

If EXEN2 = 1, then Timer 2 still does the above, but with the added feature that a 1-to-0

transition at external input T2X will also trigger the 16-bit reload and set the interrupt flag

EXF2. Again, firmware servicing the interrupt must read both TF2 and EXF2 to determine

the cause, and clear the flag(s) upon exit.

Note:

The uPSD34xx does not support selectable up/down counting in Auto-reload mode (this

feature was an extension to the original 8032 architecture).

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