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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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UPSD3422 датащи(PDF) 79 Page - STMicroelectronics |
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UPSD3422 датащи(HTML) 79 Page - STMicroelectronics |
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79 / 293 page  uPSD34xx MCU bus interface 79/293 A[10:8] and the remaining pins can be configured for other functions such as generating chip selects to the external devices. Figure 20. Connecting external devices using ports A and B for address AD[15:0] Figure 21. Connecting external devices using port A and an external latch for address AD[15:0] 18.4 Programmable bus timing The length of the bus cycles are user programmable at run time. The number of MCU_CLK periods in a bus cycle can be specified in the SFR register named BUSCON (see Table 37 on page 81). By default, the BUSCON Register is loaded with long bus cycle times (6 MCU_CLK periods) after a reset condition. It is important that the post-reset initialization firmware sets the bus cycle times appropriately to get the most performance, according to Table 38 on page 82. Keep in mind that the PSD Module has a faster Turbo Mode (default) and a slower but less power consuming Non-Turbo Mode. The bus cycle times must be programmed in BUSCON to optimize for each mode as shown in Table 38. See Section 28.5: PSD module detailed operation on page 201 for more details. uPSD34xx PSD Module External 8-bit Device MCU Module AI10434 AD[7:0] D[7:0] A8-15 A0-7 Port A CS Port B AD[15:8] PSEN ALE RD or WR RD or WR uPSD34xx PSD Module External 8-bit Device L A T C H MCU Module AI10435 AD[7:0] D[7:0] A7-0 A8-15 CS Port B AD[15:8] PSEN ALE RD or WR RD or WR |
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