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MPC8280 датащи(PDF) 281 Page - Freescale Semiconductor, Inc |
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MPC8280 датащи(HTML) 281 Page - Freescale Semiconductor, Inc |
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281 / 1386 page ![]() The 60x Bus MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 8-5 bus specification. For more information, see Section 8.5.5, “Port Size Data Bus Transfers and PSDVAL Termination.” Figure 8-3. Basic Transfer Protocol The basic functions of the address and data tenures are as follows: • Address tenure — Arbitration: Address bus arbitration signals are used to request and grant address bus mastership. — Transfer: After a device is granted address bus mastership, it transfers the address. The address signals and the transfer attribute signals control the address transfer. — Termination: After the address transfer, the system acknowledges that the address tenure is complete or that it must be repeated, signalled by the assertion of the address retry signal (ARTRY). • Data tenure — Arbitration: After the address tenure begins, the bus device arbitrates for data bus mastership. — Transfer: After the device is granted data bus mastership, it samples the data bus for read operations or drives the data bus for write operations. — Termination: Acknowledgment of a successful data transfer is required after each beat in a data transfer. In single-beat transactions, the data termination signals also indicate the end of the tenure. In burst or port-size accesses, data termination signals indicate the completion of individual beats and, after the final data beat, the end of the tenure. 8.3.1 Arbitration Phase The external bus design permits one device (either the MPC8280 or a bus-attached external device) to be granted bus mastership at a time. Bus arbitration can be handled either by an external central bus arbiter or by the internal on-chip arbiter. In the latter case, the system is optimized for three external bus masters besides the MPC8280. The arbitration configuration (external or internal) is determined at system reset by sampling configuration pins. See Section 4.3.2.2, “60x Bus Arbiter Configuration Register (PPC_ACR),” for more information. Data Tenure Arbitration 1- or 4-Beat Transfer Termination Next Address Tenure Independent Address and Data Tenures Arbitration Transfer Termination |
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