PM5366 datasheet(44/267 Pages) PMC

44 / 267 page

PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

Pin Name

Type

No.

Function

TFPO/TMFPO/

TGAPCLK[3]

TFPO/TMFPO/

TGAPCLK[2]

TFPO/TMFPO/

TGAPCLK[1]

Output F4

Framer Transmit Frame Pulse/Multi-frame Pulse

Reference (TFPO/TMFPO[3:1]). TFPO/TMFPO[3:1]

are valid when the TEMAP-84 is configured as DS3

framers by setting the OPMODE_SPEx[2:0] bits in the

SPE Configuration registers and setting the TXGAPEN

bit to 0 in the DS3 and E3 Master Unchannelized

Interface Options register.

In DS3 mode, TFPO[3:1] pulse high for 1 out of every

85 clock cycles, giving a reference M-subframe

indication. In E3 mode, TFPO[3:1] pulse high to mark

the first bit of the frame.

In DS3 mode, TMFPO[3:1] pulse high for 1 out of

every 4760 clock cycles, giving a reference M-frame

indication. TMFPO[3:1] behaves the same as

TFPO[3:1] for E3 applications. This is selected by

setting the TXMFPO bit in the DS3 and E3 Master

Unchannelized Interface Options Registers.

TFPO/TMFPO[3:1] will be updated on the falling edge

of TICLK when the associated TDATIFALL register bit

is a logic 0 and on the rising edge when TDATIFALL is

a logic 1.

Framer Gapped Transmit Clock (TGAPCLK[3:1]).

TGAPCLK[3:1] are valid when the TEMAP-84 is

configured as DS3 framers by setting the

OPMODE_SPEx[2:0] bits in the SPE Configuration

registers and setting the TXGAPEN bit to 1 in the DS3

and E3 Master Unchannelized Interface Options

TGAPCLK[3:1] are derived from the transmit reference

clocks TICLK[3:1] or from the receive clock if loop-

timed. The overhead bit (gapped) positions are

generated internal to the device. TGAPCLK[3:1] are

held high during the overhead bit positions. This clock

is useful for interfacing to devices which source

payload data only.

TGAPCLK[3:1] are used to sample the associated

TDATI[3:1] inputs.

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