M25PX32-VMP6F datasheet(45/63 Pages) STMICROELECTRONICS

номер детали	M25PX32-VMP6F

подробное описание детали	32-Mbit, dual I/O, 4-Kbyte subsector erase, serial Flash memory with 75 MHz SPI bus interface

PDF	63 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

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M25PX32

Instructions

45/63

6.16

Sector Erase (SE)

The Sector Erase (SE) instruction sets to 1 (FFh) all bits inside the chosen sector. Before it

can be accepted, a Write Enable (WREN) instruction must previously have been executed.

After the Write Enable (WREN) instruction has been decoded, the device sets the Write

Enable Latch (WEL).

The Sector Erase (SE) instruction is entered by driving Chip Select (S) Low, followed by the

instruction code, and three address bytes on Serial Data input (DQ0). Any address inside

the Sector (see Table 4) is a valid address for the Sector Erase (SE) instruction. Chip Select

(S) must be driven Low for the entire duration of the sequence.

The instruction sequence is shown in Figure 24.

Chip Select (S) must be driven High after the eighth bit of the last address byte has been

latched in, otherwise the Sector Erase (SE) instruction is not executed. As soon as Chip

Select (S) is driven High, the self-timed Sector Erase cycle (whose duration is tSE) is

initiated. While the Sector Erase cycle is in progress, the Status Register may be read to

check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is 1

during the self-timed Sector Erase cycle, and is 0 when it is completed. At some unspecified

time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.

A Sector Erase (SE) instruction applied to a page which is protected by the Block Protect

(BP2, BP1, BP0) bits (see Table 3 and Table 4) is not executed.

Figure 24.

Sector Erase (SE) instruction sequence

Address bits A23 to A22 are Don’t care.

24 Bit Address

DQ1

AI13742

3456789

29 30 31

Instruction

23 22

MSB

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