CLRC663 datasheet(79/177 Pages) NXP

79 / 177 page

NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

Bit

Symbol

Description

7 to 0

T2Counter

ValLo

Low byte of the current counter value of Timer1Timer2.

This value shall not be read out during reception.

Table 110. T2CounterValLo bits

9.7.2.15 T3Control

Control register of the Timer 3.

Bit

Symbol

T3StopRx

T3Start

T3AutoRestart

T3Clk

Access

rights

r/w

RFU

r/w

RFU

r/w

Table 111. T3Control register (address 1Eh)

Bit

Symbol

Description

T3StopRx

If set, the timer stops immediately after receiving the first 4 bits. If cleared, indicates that

the timer is not stopped automatically.

Note: If LFO Trimming is selected by T3Start, this bit has no effect.

RFU

5 to 4

T3Start

00b - timer is not started automatically

01 b - timer starts automatically at the end of the transmission

10 b - timer is used for LFO trimming without underflow (Start/Stop on PosEdge)

11 b - timer is used for LFO trimming with underflow (Start/Stop on PosEdge).

T3AutoRestart

Set to logic 1, the timer automatically restarts its countdown from T3ReloadValue, after

the counter value has reached the value zero.

Set to logic 0 the timer decrements to zero and stops.

The bit Timer1IRQ is set to logic 1 when the timer underflows.

RFU

1 to 0

T3Clk

00 b - the timer input clock is 13.56 MHz.

01 b - the timer input clock is 211,875 kHz.

10 b - the timer input clock is an underflow of Timer0

11 b - the timer input clock is an underflow of Timer1

Table 112. T3Control bits

9.7.2.16 T3ReloadHi

High byte of the reload value of Timer3.

Bit

Symbol

T3ReloadHi

Access

rights

r/w

Table 113. T3ReloadHi register (address 1Fh);

CLRC663

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5.3 — 3 January 2024

79 / 177

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