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CLRC663 датащи(PDF) 65 Page - NXP Semiconductors |
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CLRC663 датащи(HTML) 65 Page - NXP Semiconductors |
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65 / 177 page ![]() NXP Semiconductors CLRC663 High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus Bit Symbol Description 1 to 0 FIFOLengthExtBits Defines the bit9 (MSB) and bit8 for the FIFO length (extension of FIFOLength). These two bits are only evaluated in the 512-byte FIFO mode. The bits 7..0 are defined in register FIFOLength. Table 56. FIFOControl bits...continued 9.4.2 WaterLevel Defines the level for FIFO under- and overflow warning levels.This register is extended by 1 bit in FIFOControl in case the 512-byte FIFO mode is activated by setting bit FIFOControl.FIFOSize. Bit 7 6 5 4 3 2 1 0 Symbol WaterLevelBits Access rights r/w r/w r/w r/w r/w r/w r/w r/w Table 57. WaterLevel register (address 03h); Bit Symbol Description 7 to 0 WaterLevelBits Sets a level to indicate a FIFO-buffer state which can be read from bits HighAlert and LowAlert in the FifoControl. In 512-byte FIFO mode, the register is extended by bit WaterLevelExtBit in the FIFOControl. This functionality can be used to avoid a FIFO buffer overflow or underflow: The bit HiAlert bit in FIFO Control is read logic 1, if the number of bytes in the FIFO- buffer is equal or less than the number defined by the waterlevel configuration. The bit LoAlert bit in FIFO control is read logic 1, if the number of bytes in the FIFO buffer is equal or less than the number defined by the waterlevel configuration. Note: For the calculation of HiAlert and LoAlert, see register description of these bits (see Section 9.4.1). Table 58. WaterLevel bits 9.4.3 FIFOLength Number of bytes in the FIFO buffer. In 512-byte mode, this register is extended by FIFOControl.FifoLength. Bit 7 6 5 4 3 2 1 0 Symbol FIFOLength Access rights dy Table 59. FIFOLength register (address 04h); reset value: 00h Bit Symbol Description 7 to 0 FIFOLength Indicates the number of bytes in the FIFO buffer. In 512-byte mode this register is extended by the bits FIFOLength in the FIFOControl register. Writing to the FIFOData register increments, reading decrements the number of available bytes in the FIFO. Table 60. FIFOLength bits CLRC663 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 5.3 — 3 January 2024 65 / 177 |
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