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CLRC663 датащи(PDF) 70 Page - NXP Semiconductors

номер детали CLRC663
подробное описание детали  High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus
PDF  177 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC663 датащи(HTML) 70 Page - NXP Semiconductors

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NXP Semiconductors
CLRC663
High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus
Bit
Symbol
Description
1
ProtErr
A protocol error has occurred. A protocol error can be a wrong stop bit, a missing or wrong ISO/
IEC14443B EOF or SOF or a wrong number of received data bytes. When a protocol error is
detected, data reception is stopped.
Note: ProtErr is automatically cleared at start of a receive or transceive command. In case of a
transceive command, it is cleared at the start of the receiving phase ("Wait for data" state).
Note: When a protocol error occurs the last received data byte is not written into the FIFO.
0
IntegErr
A data integrity error has been detected. Possible cause can be a wrong parity or a wrong CRC.
In case of a data integrity error the reception is continued.
Note: IntegErr is automatically cleared at start of a Receive or Transceive command. In case of a
Transceive command, it is cleared at the start of the receiving phase ("Wait for data" state).
Note: If the NoColl bit is set, also a collision is setting the IntegErr.
Table 72. Error bits...continued
9.6.2 Status
Status register.
Bit
7
6
5
4
3
2
1
0
Symbol
-
-
Crypto1On
-
-
ComState
Access
rights
RFU
RFU
dy
RFU
RFU
r
Table 73. Status register (address 0Bh)
Bit
Symbol
Description
7 to 6
-
RFU
5
Crypto1On
Indicates if the MIFARE Classic Crypto is on. Clearing this bit is switching the MIFARE Cassic
Crypto off. The bit can only be set by the MFAuthent command.
4 to 3
-
RFU
ComState shows the status of the transmitter and receiver state machine:
000b ... Idle
001b ... TxWait
011b ... Transmitting
101b ... RxWait
110b ... Wait for data
111b ... Receiving
2 to 0
ComState
100b ... not used
Table 74. Status bits
9.6.3 RxBitCtrl
Receiver control register.
CLRC663
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 5.3 — 3 January 2024
70 / 177



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