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7.6.1.8 Charge Result (CHARGE) Register (Address = Ah) [reset = 0h]

The CHARGE register is shown in Table 7-12.

Return to the Summary Table.

Table 7-12. CHARGE Register Field Descriptions

Bit

Field

Type

Reset

Description

39-0

CHARGE

Calculated charge output. Output value is in Coulombs.2's-

complement value.

Conversion factor: 30 μC/LSB.

7.6.1.9 Diagnostic Flags and Alert (ALERT_DIAG) Register (Address = Bh) [reset = 0001h]

The ALERT_DIAG register is shown in Table 7-13.

Return to the Summary Table.

Table 7-13. ALERT_DIAG Register Field Descriptions

Bit

Field

Type

Reset

Description

ALATCH

R/W

When the Alert Latch Enable bit is set to Transparent mode, the

Alert pin and Flag bit reset to the idle state when the fault has been

cleared.

When the Alert Latch Enable bit is set to Latch mode, the Alert

pin and Alert Flag bit remain active following a fault until the

ALERT_DIAG Register has been read.

0h = Transparent

1h = Latched

CNVR

R/W

Setting this bit high configures the Alert pin to be asserted when

the Conversion Ready Flag (bit 1) is asserted, indicating that a

conversion cycle is complete.

0h = Disable conversion ready flag on ALERT pin

1h = Enables conversion ready flag on ALERT pin

SLOWALERT

R/W

When enabled, ALERT function is asserted on the completed

averaged value.

This gives the flexibility to delay the ALERT until after the averaged

value.

0h = ALERT comparison on non-averaged (ADC) value

1h = ALERT comparison on averaged value

APOL

R/W

Alert Polarity bit sets the Alert pin polarity.

0h = Normal (active-low, open-drain)

1h = Inverted (active-high, open-drain)

ENERGYOF

This bit indicates the health of the ENERGY register.

If the 40-bit ENERGY register has overflowed this bit is set to 1.

0h = Normal

1h = Overflow

Clears by setting the RSTACC field in the Configuration register.

CHARGEOF

This bit indicates the health of the CHARGE register.

If the 40-bit CHARGE register has overflowed this bit is set to 1.

0h = Normal

1h = Overflow

Clears by setting the RSTACC field in the Configuration register.

MATHOF

This bit is set to 1 if an arithmetic operation resulted in an overflow

error.

It indicates that current and power data may be invalid.

0h = Normal

1h = Overflow

Must be manually cleared by triggering another conversion or by

clearing the accumulators with the RSTACC bit.

INA700

SBOSAB4A – MAY 2023 – REVISED SEPTEMBER 2023

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