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INA700 датащи(PDF) 24 Page - Texas Instruments |
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INA700 датащи(HTML) 24 Page - Texas Instruments |
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24 / 50 page ![]() Table 7-4. INA700 Access Type Codes (continued) Access Type Code Description R/W R/W Value can be read or written 7.6.1.1 Configuration (CONFIG) Register (Address = 0h) [reset = 0h] The CONFIG register is shown in Table 7-5. Return to the Summary Table. Table 7-5. CONFIG Register Field Descriptions Bit Field Type Reset Description 15 RST R/W 0h Reset Bit. Setting this bit to '1' generates a system reset that is the same as power-on reset. Resets all registers to default values. 0h = Normal Operation 1h = System Reset sets registers to default values This bit self-clears. 14 RSTACC R/W 0h Resets the contents of accumulation registers ENERGY and CHARGE to 0 0h = Normal Operation 1h = Clears registers to default values for ENERGY and CHARGE registers 13-6 CONVDLY R/W 0h Sets the Delay for initial ADC conversion in steps of 2 ms. 0h = 0 s 1h = 2 ms FFh = 510 ms 5 RESERVED R 0h Reserved. Always reads 0. 4 RESERVED R 1h Reserved. Always reads 1. 3-0 RESERVED R 0h Reserved. Always reads 0. INA700 SBOSAB4A – MAY 2023 – REVISED SEPTEMBER 2023 www.ti.com 24 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: INA700 |
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