ZAMC4100 datasheet(8/156 Pages) RENESAS

8 / 156 page

ZAMC4100 Datasheet

January 26, 2016

4.6.1.

Timer Mode (MODETC = 0)........................................................................................................... 113

4.6.2.

Counter Mode (MODETC = 1) ....................................................................................................... 113

4.6.3.

TIMER Module Interrupt................................................................................................................. 113

4.6.4.

TIMER Module Registers............................................................................................................... 113

4.7.

SysTick................................................................................................................................................. 113

4.8.

Master SPI Module............................................................................................................................... 114

4.8.1.

Overview ........................................................................................................................................ 114

4.8.2.

Setup Requirements for the Slave SPI of SBC.............................................................................. 114

4.8.3.

SPI Data Transfer Process ............................................................................................................ 115

4.8.4.

Continuous SPI Data Streaming .................................................................................................... 115

4.8.5.

Abrupt SPI Discontinuity ................................................................................................................ 115

4.8.6.

Interrupts and Status Flags in the Z1_SPISTAT Register ............................................................. 115

4.8.7.

Syncing the Data Transfer Rate via a Software Pause.................................................................. 116

4.8.8.

Master SPI Registers ..................................................................................................................... 116

4.9.

SW-LIN Module .................................................................................................................................... 117

4.9.1.

The Inactivity Timer........................................................................................................................ 117

4.9.2.

The BREAK/SYNC Field Detector ................................................................................................. 118

4.9.3.

SW-LIN Data Unit .......................................................................................................................... 118

4.9.4.

Description of the Receive Operation ............................................................................................ 119

4.9.5.

Description of Transmit Operation ................................................................................................. 120

4.9.6.

General Remarks for SW-LIN Usage............................................................................................. 122

4.9.7.

SW-LIN Registers .......................................................................................................................... 122

4.10.

MCU Registers Description .................................................................................................................. 123

4.10.1.

System Registers........................................................................................................................... 123

4.10.2.

GPIO Registers.............................................................................................................................. 125

4.10.3.

32 Bit Timer Registers ................................................................................................................... 128

4.10.4.

SPI Registers ................................................................................................................................. 130

4.10.5.

SW-LIN Registers .......................................................................................................................... 132

4.10.6.

FLASH Memory Registers ............................................................................................................. 136

ZAMC4100 Protection and Diagnostic Features......................................................................................... 140

5.1.

Full-Time Diagnostic and Protection Features ..................................................................................... 140

5.1.1.

Over-Current (OC) Protection ........................................................................................................ 140

5.1.2.

Over-Load (OVL) Detection using the ADC ................................................................................... 140

5.1.3.

Over-Temperature (OVT) Protection ............................................................................................. 141

5.1.4.

Over-Voltage (OV) Detection ......................................................................................................... 141

5.1.5.

Under-Voltage (UV) Detection ....................................................................................................... 141

5.1.6.

Short to GND or Vbat Protection of Sensor Supply Pin S_P and Analog Input Pins AIN1 and

AIN2 ............................................................................................................................................... 141

5.1.7.

OSCL Output Clock Failure Detection ........................................................................................... 141

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