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ZAMC4100 датащи(PDF) 7 Page - Renesas Technology Corp |
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ZAMC4100 датащи(HTML) 7 Page - Renesas Technology Corp |
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7 / 156 page ![]() ZAMC4100 Datasheet © 2016 Integrated Device Technology, Inc. 7 January 26, 2016 3.11.2. ECM Control Register ...................................................................................................................... 75 3.11.3. ECM Driver Output Diagnostic Check.............................................................................................. 76 3.12. ZAMC4100 Analog to Digital Converter ................................................................................................. 77 3.12.1. ADC Overview ................................................................................................................................. 77 3.12.2. ADC External Inputs Configuration .................................................................................................. 79 3.12.3. ADC Input MUX Control................................................................................................................... 81 3.12.4. ADC Voltage References and Result Calculation............................................................................ 84 3.12.5. ADC Configuration and ADC Status Register.................................................................................. 85 3.12.6. ADC Sample Rate............................................................................................................................ 88 3.12.7. ADC Single and Continuous Conversion ......................................................................................... 88 3.12.8. ADC Result Formatting Options....................................................................................................... 89 3.12.9. ADC Comparator and Counter......................................................................................................... 91 3.12.10. External ADC Analog Inputs Open/Short Diagnostics and Protection ............................................. 92 3.13. LIN Physical Layer (LIN PHY) ................................................................................................................ 95 3.13.1. Overview .......................................................................................................................................... 95 3.13.2. LIN PHY Operation .......................................................................................................................... 96 3.14. SBC Registers........................................................................................................................................ 99 3.14.1. SBC Registers Address Map ......................................................................................................... 100 3.14.2. Registers Write Access Signatures................................................................................................ 101 3.15. SBC Trimming ...................................................................................................................................... 102 4 ZAMC4100 MCU Functional Description .................................................................................................... 103 4.1. Overview .............................................................................................................................................. 103 4.2. Memory Organization ........................................................................................................................... 104 4.2.1. Accessing Invalid Memory Location............................................................................................... 105 4.2.2. FLASH Memory ............................................................................................................................. 105 4.2.3. INFO Area...................................................................................................................................... 107 4.2.4. RAM Memory 2kB.......................................................................................................................... 107 4.3. MCU Clock and Reset Sources............................................................................................................ 108 4.4. MCU INTERRUPTS ............................................................................................................................. 110 4.4.1. Interrupts Organization .................................................................................................................. 110 4.4.2. Interrupts Configuration ................................................................................................................. 111 4.5. GPIO Module........................................................................................................................................ 111 4.5.1. Overview ........................................................................................................................................ 111 4.5.2. GPIO Input Mode (default)............................................................................................................. 111 4.5.3. GPIO Output Mode ........................................................................................................................ 112 4.5.4. GPIO as Timer Trigger Operation.................................................................................................. 112 4.5.5. GPIO Interrupt Functionality .......................................................................................................... 112 4.5.6. GPIO Registers.............................................................................................................................. 112 4.6. 32-Bit TIMER Module ........................................................................................................................... 112 |
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