STWBC2-HP datasheet(43/96 Pages) STMICROELECTRONICS

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2.2.6.3

Functional description

This IP generates a repetitive programmable pulse pattern (usable with LED or Buzzer circuit) accordingly with

the register parameter's configuration values. Alternatively, the LED signal may be used as a general I/O signal

controlled by SW.

Here below is shown an outline view of the LED pattern generator block diagram:

Figure 45. LED_SPK block diagram overview

2.2.6.4

Programming

After power-up the IP is disabled; the usage of this requires the following program sequences:

2.2.6.4.1

Pattern generator

Configure the 16-bit repetition data pattern through the registers: LED_BUZZER_<x>_PATTERN_L and

LED_BUZZER_<x>_PATTERN_H.

Configure the pulse frequency by programming the clock pre-scale (Prescale) through

LED_BUZZER_<x>_CLK_DIV[7:2].

The pulse pattern frequency is generated according to the following equation:

Fpulse= Fafe

Clkdivision+1* Prescale

Table 32 summarizes the range of pulse frequency configurable with the register parameters assuming Fafe

= 16 MHz:

Table 32. Pulse range configuration values

Pulse frequency configuration

Prescale

Step division

Clkdivision = 0

Clkdivision = 126

Unit

256

62500

492.126

2048

7812.5

61.51575

16384

976.5625

7.689469

131072

122.0703

0.961184

Selecting the I/O driver mode operations and current sink configuring respectively the register fields

LED_BUZZER_<x>_CFG[2:0] and LED_BUZZER_<x>_CFG[4:3].

Enabling the pulse logic generation by clearing the register field LED_BUZZER_<x>_CFG[5] enable bit.

STWBC2-HP

Digital AFE functions

DS13825 - Rev 1.0

page 43/96

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