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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STWBC2-HP датащи(PDF) 48 Page - STMicroelectronics |
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STWBC2-HP датащи(HTML) 48 Page - STMicroelectronics |
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48 / 96 page  Figure 51. BB-DCDC FSM state diagram overview Note that some signals in the flow diagram may be not aligned with the RTL implementation. 2.2.7.11.1 FSM state overview Here below are listed all the FSM states: • IDLE: enabling waiting state • CHECK: check feedback comparator and start a new cycle • REFRESH_GDB: refresh gate driver B • REFRESH_GDA: refresh gate driver A • PRECHARGE: charge the inductor for a fixed amount of time • CHARGE: charge the inductor for a variable time or up to max. peak current • PREDISCHARGE: discharge the inductor for fixed amount of time • DISCHARGE: discharge the inductor for a variable time • PROBE: probe the switching node to check inductor current reversal 2.2.7.11.2 Overcurrent case When an overcurrent situation has been detected during the CHECK state, the charge and discharge timings are updated systematically with a specific rule. The goal of this rule is to regulate the current information to stay at the limit of overcurrent. STWBC2-HP Digital AFE functions DS13825 - Rev 1.0 page 48/96 |
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