(formed by pin 20 to pin 24) and at least nine times PGND vias on the thermal pad (underneath of the IC) is

important to minimize the extra impedance for the bottom layer bypass capacitors.

• Except the PGND vias underneath the thermal pad, at least four PGND vias are required to be placed as

close as possible to the PGND pin 7 to pin 10. At least two PGND vias are required to be placed as close as

possible to the PGND pin 19. This action minimizes PGND bounces and also lowers thermal resistance.

• Place the VDRV-to-PGND decoupling capacitor as close as possible to the device. TI recommends a 2.2-

µF/6.3 V/X7R/0603 or 4.7-µF/6.3 V/X6S/0603 ceramic capacitor. The voltage rating of this bypass capacitor

must be at least 6.3 V but no more than 10 V to lower ESR and ESL. The recommended capacitor size is

0603 to minimize the capacitance drop due to DC bias effect. Ensure the VDRV to PGND decoupling loop is

the smallest and ensure the routing trace is wide enough to lower impedance.

• As the input of VCC LDO, connect a 1-µF, 25-V rated ceramic capacitor to AGND for the bypassing of

the AVIN pin. TI recommends the 25-V rating is recommended but can be lowered to 16-V rating for an

application with tightly regulated 12-V input bus.

• Connect a 2.2-µF, 6.3-V (or 10 V) rated ceramic capacitor to AGND for the bypassing of the VCC pin. Placing

a 1-Ω resistor between the VCC pin and VDRV pin forms a RC filter on VCC pin, which greatly reduces the

noise impact from power stage driver circuit.

• For remote sensing, the connections from FB voltage divider resistors to the remote location must be a

pair of PCB traces with at least 12 mil trace width, and must implement Kelvin sensing across a high

bypass capacitor of 0.1 μF or higher on the sensing location. The ground connection of the remote sensing

signal must be connected to the GOSNS pin. The VOUT connection of the remote sensing signal must be

connected to the VOSNS pin and the top feedback resistor RFB_top. To maintain stable output voltage and

minimize the ripple, the pair of remote sensing lines must stay away from any noise sources such as inductor

and SW node, or high frequency clock lines. TI recommends to shield the pair of remote sensing lines with

ground planes above and below.

• For single-end sensing, connect the FB voltage divider resistors to a high-frequency local bypass capacitor of

0.1 μF or higher, and short GOSNS to AGND with shortest trace.

• The AGND pin 32 must be connected to a solid PGND plane. TI recommends to place AGND via close to

pin 32 to route AGND from top layer to bottom layer, and then connect the AGND trace to the PGND vias

(underneath IC) through either a net-tie or a 0-Ω resistor on the bottom layer.

• Connecting a resistor from pin 1 (ILIM) to AGND sets the OCL threshold. Connecting a resistor from pin

29 (SS) to AGND sets soft-start time, internal compensation, and fault response. Connecting a resistor from

pin 36 (MODE) to AGND sets the switching frequency and the operation mode. TI requires not to have any

capacitor on these 3 pins (ILIM, SS, and MODE). A capacitor on any of these 3 pins likely leads to a wrong

detection result.

• Pin 6 (DNC) is a Do-Not-Connect pin. Pin 6 can be shorted to pin 37, which is an NC pin (No internal

Connection). Do not connect pin 6 to any other net including ground.

www.ti.com

TPS548C26

SLVSGM2 – MARCH 2023

Copyright © 2023 Texas Instruments Incorporated

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