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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DRV8461SPWPR датащи(PDF) 11 Page - Texas Instruments |
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DRV8461SPWPR датащи(HTML) 11 Page - Texas Instruments |
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11 / 117 page  Typical values are at TA = 25°C and VVM = 24 V. All limits are over recommended operating conditions, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VUVLO,HYS Undervoltage hysteresis Rising to falling threshold 100 mV VRST VM UVLO reset VCC = DVDD, SPI interface, VM falling, device reset, no SPI communications 3.4 V VCPUV Charge pump undervoltage VCP falling VVM + 2 V IOCP Overcurrent protection Current through any FET 4.8 A tOCP Overcurrent detection delay H/W Interface 2.2 μs SPI Interface, TOCP = 0b 1.2 SPI Interface, TOCP = 1b 2.2 tRETRY Overcurrent retry time 4.1 ms tOL Open load detection time H/W Interface 60 ms SPI Interface, OL_T = 00b 30 SPI Interface, OL_T = 01b 60 SPI Interface, OL_T = 10b 120 IOL Open load current threshold 110 mA TOTW Overtemperature warning SPI Interface, Die temperature TJ 135 150 165 °C THYS_OTW Overtemperature warning hysteresis SPI Interface, Die temperature TJ 20 °C TOTSD Thermal shutdown Die temperature TJ 150 165 180 °C THYS_OTSD Thermal shutdown hysteresis Die temperature TJ 20 °C (1) Guaranteed by design 6.5.1 SPI Timing Requirements MIN NOM MAX UNIT tREADY SPI ready, VM > VRST 1 ms tSCLK SCLK minimum period 100 ns tSCLKH SCLK minimum high time 50 ns tSCLKL SCLK minimum low time 50 ns tSU_SDI SDI input setup time 20 ns tH_SDI SDI input hold time 30 ns tD_SDO SDO output delay time, SCLK high to SDO valid, CL = 20 pF 30 ns tSU_nSCS nSCS input setup time 50 ns tH_nSCS nSCS input hold time 50 ns tHI_nSCS nSCS minimum high time before active low 2 µs tDIS_nSCS nSCS disable time, nSCS high to SDO high impedance 10 ns www.ti.com DRV8461 SLOSE98 – DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: DRV8461 |
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