DRV8461SPWPR datasheet(69/117 Pages) TI

69 / 117 page

The first device in the chain receives data from the MCU in the following format for 3-device configuration: 2

bytes of header (HDRx) followed by 3 bytes of address (Ax) followed by 3 bytes of data (Dx).

HDR1

HDR2

SDI1

nSCS

HDR1

HDR2

SDO3

HDR1

HDR2

SDO1 / SDI2

HDR1

HDR2

SDO2 / SDI3

All Address bytes

reach destination

All Data bytes

reach destination

Reads executed here

Writes executed here

Status response here

Figure 7-50. SPI Frame With Three Devices

After the data has been transmitted through the chain, the MCU receives the data string in the format shown in

Figure 7-51 for 3-device configuration: 3 bytes of status (Sx) followed by 2 bytes of header followed by 3 bytes of

report (Rx).

HDR1

HDR2

SDI

nSCS

HDR1

HDR2

SDO

Figure 7-51. SPI Data Sequence for Three Devices

The header bytes contain information of the number of devices connected in the chain, and a global clear fault

command that will clear the fault registers of all the devices on the rising edge of the chip select (nSCS) signal.

Header values N5 through N0 are 6 bits dedicated to show the number of devices in the chain. Up to 63 devices

can be connected in series for each daisy chain connection.

The 5 LSBs of the HDR2 register are don’t care bits that can be used by the MCU to determine integrity of the

daisy chain connection. Header bytes must start with 1 and 0 for the two MSBs.

HDR 1

HDR 2

CLR

No. of devices in the chain

(up to 2

6 ± 1= 63)

1 = global FAULT clear

0 = GRQ¶W FDUH

'RQ¶W FDUH

Figure 7-52. Header Bytes

The status byte provides information about the fault status register for each device in the daisy chain so that

the MCU does not have to initiate a read command to read the fault status from any particular device. This

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