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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DRV8461SPWPR датащи(PDF) 8 Page - Texas Instruments |
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DRV8461SPWPR датащи(HTML) 8 Page - Texas Instruments |
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8 / 117 page  MIN MAX UNIT IFS Motor full-scale current (xOUTx) 0 3 (2) A IRMS Motor RMS current (xOUTx) 0 2.1 (2) A TA Operating ambient temperature –40 125 °C TJ Operating junction temperature –40 150 °C 1. STEP input can operate up to 500 kHz, but system bandwidth is limited by the motor load. 2. Power dissipation and thermal limits must be observed. 6.4 Thermal Information THERMAL METRIC DDW PWP UNIT RθJA Junction-to-ambient thermal resistance 23.2 25.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 10.9 15.5 °C/W RθJB Junction-to-board thermal resistance 6.6 6.3 °C/W ψJT Junction-to-top characterization parameter 0.2 0.2 °C/W ψJB Junction-to-board characterization parameter 6.5 6.3 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 1.3 1.3 °C/W 6.5 Electrical Characteristics Typical values are at TA = 25°C and VVM = 24 V. All limits are over recommended operating conditions, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES (VM, DVDD) IVM VM operating supply current ENABLE = 1, nSLEEP = 1, No motor load, VCC = External 5V 5 7.5 mA ENABLE = 1, nSLEEP = 1, No motor load, VCC = DVDD 8 11 IVMQ VM sleep mode supply current nSLEEP = 0 2.5 5 μA tSLEEP Sleep time nSLEEP = 0 to sleep-mode 120 μs tRESET nSLEEP reset pulse nSLEEP low to clear fault 20 40 μs tWAKE Wake-up time H/W interface, nSLEEP = 1 to output transition 0.8 1.2 ms SPI interface, nSLEEP = 1 to SPI ready 0.15 0.25 ms tON Turn-on time(1) VM > UVLO to output transition 1 1.3 ms VDVDD Internal regulator voltage No external load, 6 V < VVM < 65 V 4.75 5 5.25 V No external load, VVM = 4.5 V 4.2 4.35 V CHARGE PUMP (VCP, CPH, CPL) VVCP VCP operating voltage 6 V < VVM < 65 V VVM + 5 V f VCP Charge pump switching frequency VVM > UVLO; nSLEEP = 1 357 kHz fCLK Internal digital clock frequency VVM > UVLO; nSLEEP = 1 10 MHz LOGIC-LEVEL INPUTS (STEP, DIR, MODE, DECAY1, nSCS, SCLK, SDI, nSLEEP) DRV8461 SLOSE98 – DECEMBER 2022 www.ti.com 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: DRV8461 |
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