DRV8461SPWPR datasheet(73/117 Pages) TI

73 / 117 page

Table 7-34. Access Type Codes (continued)

Access Type

Code

Description

Write

Reset or Default Value

-n

Value after reset or the default

value

7.5.1 Status Registers

The status registers are used to reporting warning and fault conditions. Status registers are read-only registers.

Table 7-35 lists the memory-mapped registers for the status registers. All register offset addresses not listed in

Table 7-35 should be considered as reserved locations and the register contents should not be modified.

Table 7-35. Status Registers Summary Table

Address

Section

0x00

FAULT

0x01

DIAG1

0x02

DIAG2

0x03

DIAG3

7.5.1.1 FAULT (address = 0x00) [Default = 00h]

FAULT status is shown in Figure 7-56 and described in Table 7-36.

Read-only

Return to the Register Maps Table

Figure 7-56. FAULT Register

FAULT

SPI_ERROR

UVLO

CPUV

OCP

STL

R-0b

Table 7-36. FAULT Register Field Descriptions

Bit

Field

Type

Default

Description

FAULT

FAULT bit is 1b when device has any fault condition. During normal

operation, FAULT bit is 0b. nFAULT pin is pulled down when FAULT bit

is 1b. nFAULT pin is released during normal operation.

SPI_ERROR

Indicates SPI protocol errors, such as more SCLK pulses than are required

or SCLK is absent even though nSCS is low. SPI_ERROR becomes 1b in

fault and the nFAULT pin is driven low. Normal operation resumes when

the protocol error is removed and a clear faults command has been issued

either through the CLR_FLT bit or an nSLEEP reset pulse.

UVLO

When this bit is 1b, it indicates an supply undervoltage lockout fault

condition.

CPUV

When this bit is 1b, it indicates charge pump undervoltage fault condition.

OCP

When this bit is 1b, it indicates overcurrent fault condition

STL

When this bit is 1b, it indicates motor stall condition.

Logic OR of the overtemperature warning (OTW) and overtemperature

shutdown (OTSD). When this bit is 1b, it indicates overtemperature fault.

When this bit is 1b, it indicates open-load fault condition.

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