DRV8461SPWPR datasheet(104/117 Pages) TI

104 / 117 page

8.2.4.4 Power Dissipation Due to Quiescent Current

When the VCC pin is connected to an external voltage, the quiescent current is typically 5 mA. The power

dissipation due to the quiescent current consumed by the power supply is calculated as shown below -

PQ = VVM x IVM

(23)

Substituting the values, quiescent power loss can be calculated as shown below -

PQ = 24-V x 5-mA = 0.12-W

(24)

Note

The quiescent power loss is calculated using the typical operating supply current (IVM) which is

dependent on supply-voltage, temperature and device to device variations.

8.2.4.5 Total Power Dissipation

The total power dissipation (PTOT) is calculated as the sum of conduction loss, switching loss and the quiescent

power loss as shown in Equation 25.

PTOT = PCOND + PSW + PQ = 2.7-W + 0.428-W + 0.12-W = 3.248-W

(25)

8.2.4.6 Device Junction Temperature Estimation

For an ambient temperature of TA and total power dissipation (PTOT), the junction temperature (TJ) is calculated

as -

TJ = TA + (PTOT x RθJA)

Considering a JEDEC standard 4-layer PCB, the junction-to-ambient thermal resistance (RθJA) is 23.2 °C/W for

the DDW package and 25.2 °C/W for the PWP package.

Assuming 25°C ambient temperature, the junction temperature for the DDW package is calculated as shown

below -

TJ = 25°C + (3.248-W x 23.2 °C/W) = 100.4 °C

(26)

The junction temperature for the PWP package is calculated as shown below -

TJ = 25°C + (3.248-W x 25.2 °C/W) = 106.8 °C

(27)

As explained in Section 8.2.4.2, for more accurate calculation, consider the dependency of on-resistance of

FETs with device junction temperature shown in Section 6.6.

For example,

• At 100.4 °C junction temperature, the on-resistance will likely increase by a factor of 1.3 compared to the

on-resistance at 25 °C.

• The initial estimate of conduction loss was 2.7 W.

• New estimate of conduction loss will therefore be 2.7 W x 1.3 = 3.51 W.

• New estimate of the total power loss will accordingly be 4.058 W.

• New estimate of junction temperature for the DDW package will be 119.1 °C.

• Further iterations are unlikely to increase the junction temperature estimate by significant amount.

DRV8461

SLOSE98 – DECEMBER 2022

www.ti.com

104

Submit Document Feedback

Product Folder Links: DRV8461

DRV8461SPWPR датащи(PDF) 104 Page - Texas Instruments

DRV8461SPWPR датащи(HTML) 104 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL