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L9960 датащи(PDF) 42 Page - STMicroelectronics |
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L9960 датащи(HTML) 42 Page - STMicroelectronics |
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42 / 95 page ![]() Functional description L9960, L9960T 42/95 DS11115 Rev 10 4.6 Driver configuration The following features of the driver stage are configurable by SPI allowing to better fit it to the application requirements and also to the type of load. Slew rate control Current limitation thresholds Overcurrent thresholds Thermal warning and Shutdown thresholds 4.6.1 Slew rate control The slew rate of each high side power transistor of the bridge is controlled either during turn- on and turn-off (current and voltage slew rate). The same setting is applied for both switching phases. Moreover, the slew rate is configurable by SPI in order to get the best trade-off between conducted/radiated EMI and power dissipation during switching. The overall delay implemented between high-side and low-side transistor switching is adjusted automatically to avoid any cross-conduction through one half-bridge in all conditions (Tsw). 4.6.2 Current slew rate The current slew rate can be set in real time by SPI. The corresponding read/write bit is "ISR". No external component is needed to select the current slew rate range. Note: (-) available in the D7 bit position in SPI command frame 3. Current slew rate depends upon the ISR/NOSR configuration also on the following bits and conditions (ILIM_REG, overcurrent or Tj) as defined in the table below. Table 46. ISR Bit config Description Condition 0 see table below - 1 default value see table Reset value Table 47. Range current slew rate Range/ condition ISR TDSR NOSR Comment SLOW 0 X 0 Slow DI/DT FAST 1 X 0 Fast DI/DT SR disabled if ILIM_REG = 1 Or NOC=0 XXX current slew rate not controlled Slew rate disabled if tj > Otwam X 1 X Slew rate disabled X X 1 |
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