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L9960 датащи(PDF) 46 Page - STMicroelectronics |
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L9960 датащи(HTML) 46 Page - STMicroelectronics |
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46 / 95 page ![]() Functional description L9960, L9960T 46/95 DS11115 Rev 10 During phase B (voltage slope control), a constant gate current IB results in a defined dVMOS/dt due to the Miller capacitance of the output stage. VS/R_th is the threshold voltage for the voltage comparator connected to the output. VL is the low voltage of the transistor. 4.6.4 Current limitation A chopper current limitation is integrated in the L9960. This current limitation is used during transient phases (for instance, fast move of the throttle) or in case of stalled motor shaft, mainly to protect the actuator and also reduce the power dissipation inside the L9960. When the current reaches the current limitation threshold, the information is stored and latched in a bit called "ILIM_REG". This bit can be reset by the three methods defined previously (SPI, DIS, RESET). Note: (-) available in the R3 bit position in SPI answer frame 8a. The current limitation strategy is based on one threshold with hysteresis that leads to a controlled current ripple. As soon as current reaches ILIMH threshold (TlimH filter expiration) L9960 switches to NOSR mode, the internal SR control (very fast SR), and the ILIM_REG bit in ON-Diagnosis will be set to "1". Tdiag2 timing starts and overcurrent control is now enabled. The Tdiag2 timing is used to ensure short circuit detection: in case current reaches Ioc threshold (Toc filter implemented) before Tdiag2 expiration, the device will set the relative OVC diagnosis bits (OCH0,OCH1,OCL0,OCL1) according to the 4 MOS overcurrent thresholds data. L9960 is put in Tristate due to an "overcurrent" event that has been detected on at least one MOS. In case of NO OVC detection (no Ioc threshold reached) at the end of the Tdiag2 timing, the device takes the control, deactivates the VVL mode (if selected), and enters current limitation. The HS driver is switched off and it is forced an active freewheeling phase on both LS drivers that decreases current during t_off_min. This timing is used to assure a minimum recirculation time, to avoid any switch-on of the HS driver regardless of the PWM="1" user command (T-off-min timing will be also triggered by any possible falling edge on PWM before the end of Tdiag2 timing, since PWM information is still being analyzed). The value of the blanking time depends on a Vps threshold Vps_norm. If VPS crosses the Vps_norm threshold while Tdiag2 has already started, its value is not affected. Table 56. ILIM_REG Bit status Description Condition 0 Latched I < Ilim_H and Toff > Toffmin default value 1 Latched I > Ilim_H and Tdiag2 expired - |
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