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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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L9960 датащи(PDF) 23 Page - STMicroelectronics |
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L9960 датащи(HTML) 23 Page - STMicroelectronics |
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23 / 95 page  DS11115 Rev 10 23/95 L9960, L9960T Functional description 94 Note: (-) available in position R1 of the SPI answer frame 8a. Note: (-) available in position R0 of the SPI answer frame 12b. Figure 9. VDD5 under voltage monitoring VDD5 over-voltage protection Although the VDD5 input pin and all I/O's withstand up to 19 V, an over-voltage circuitry is implemented to ensure that the bridge is kept in disable condition when VDD5 voltage is higher than the VDD5 over-voltage threshold (VDD5_ov_th) for duration longer than "TVDD5_ov”. This VDD5 over-voltage condition is also feedbacked directly to NDIS pin, by pulling NDIS to LOW after the filter time “TVDD5_ov ”. The NDIS pin is released when VDD5 voltage decreases below the "VDD5_ov_th" threshold and wait hysteresis as well as TVDD5_ov filtering implemented + Thold_ndis filter time are expired. The information is readable via 2 diagnostics bits called VDD5_OV_REG (latched) and VDD_OV (unlatched). Table 17. VDD_UV_REG Bit status Description Condition 0 Latched Vdd > Vdd_uv longer than Tvdd_uv1 Default Value 1 Latched Vdd < Vdd_uv longer than Tvdd_uv1 - Table 18. VDD_UV Bit status Description Condition 0 Vdd > Vdd_uv longer than Tvdd_uv1 Default Value 1 Vdd < Vdd_uv longer than Tvdd_uv1 - Tvdd _uv 1 T < T vdd_uv1 Vdd _uv _th Vdd VDD_UV ON-STATE ON-STATE DISABLE BRIDGE STATE Vdd _uv _hys NDIS Tvdd _uv 2 Tvdd _uv 1 T > Thold _ndis VDD_UV UV_DIS filter 2.6ms delay 500ms UV_DIS_filtered GAPGPS02315 |
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