VSC8658 datasheet(33/95 Pages) MICROSEMI

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Functional Descriptions

VMDS-10242 VSC8658 Datasheet Revision 4.1

CLAMP Allows the state of the signals driven from the component pins to be determined from the

boundary scan register while the bypass register is selected as the serial path between TDI and TDO.

While the CLAMP instruction is selected, the signals driven from the component pins do not change.

HIGHZ Places the component in a state in which all of its system logic outputs are placed in a high-

impedance state. In this state, an in-circuit test system may drive signals onto the connections normally

driven by a component output without incurring a risk of damage to the component. This makes it

possible to use a board where not all of the components are compatible with the IEEE 1149.1 standard.

BYPASS The bypass register contains a single shift-register stage and is used to provide a minimum-

length serial path (one TCK clock period) between TDI and TDO to bypass the device when no test

operation is required.

The following table provides more information about the location and IEEE compliance of the JTAG

instruction codes used in the VSC8658. For more information about these IEEE specifications, visit the

IEEE Web site at www.IEEE.org.

4.16.9

Boundary Scan Register Cell Order

All inputs and outputs are observed in the boundary scan register cells. All outputs are additionally driven

by the contents of boundary scan register cells. Bidirectional pins have all three related boundary scan

The complete boundary scan cell order is available as a BSDL file format on the Microsemi Web site at

www.microsemi.com.

4.17

IEEE 1149.6 AC-JTAG Boundary Scan Interface

The IEEE 1149.6 AC-JTAG solution integrated on all SerDes ports of the VSC8658 device extends the

capability of IEEE 1149.1 boundary scan for robust board-level testing. This interface is backward-

compatible to the IEEE 1149.1 standard.

Table 8 •

JTAG Interface Instruction Codes

Instruction

Code

Selected Register

Width

IEEE 1149.1

Specification

IEEE 1149.6

Specification

EXTEST

0000

Boundary-Scan

244

Mandatory

SAMPLE/PRELOA

0001

Boundary-Scan

244

Mandatory

IDCODE

0110

Device Identification

Optional

CLAMP

0010

Bypass Register

Optional

HIGHZ

0011

Bypass Register

Optional

BYPASS

1111

Bypass Register

Mandatory

EXTEST_PULSE

0100

Boundary-Scan Register

244

Mandatory

EXTEST_TRAIN

0101

Boundary-Scan Register

244

Mandatory

RESERVED

0111,

1000 through

1110

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