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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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UPD360 датащи(PDF) 161 Page - Microchip Technology |
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UPD360 датащи(HTML) 161 Page - Microchip Technology |
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161 / 221 page  2016-2017 Microchip Technology Inc. DS00002084C-page 161 UPD360 11.4.3.11 RX SOP Interrupt Enable Register (RX_SOP_IRQ_EN) Setting a bit in this register will enable to corresponding source to generate an interrupt. Note that only interrupt gener- ation is affected. The RX SOP Interrupt Status Register (RX_SOP_IRQ_STAT) will still reflect the status of the event. All interrupts are disabled after POR. 2 UPD_WU_EN If this bit is set, the MAC, upon detecting receive activity, will request that the system clock be started. This bit does not affect the wake up interrupt (UPD_ACT_WS) generation. Note: Once clocks have been started, this bit does not affect the MAC's indication that it requires the clock. Even if this bit is cleared, the MAC, once it is non-idle (i.e. squelch is active), will indicate that it requires the clock. Only the period between the asynchronous wake up and the start of squelch is affected. R/W 0b 1 RESERVED RO - 0 USB_PD_ACT_WS_EN Setting this bit enables the UPD_ACT_WS interrupt. R/W 0b Address: 1A8Ah Size: 8 bits Bits Description Type Default 7:5 RESERVED RO - 4:0 RX_SOP_EN Setting a bit enables the corresponding RX_SOP interrupt. Bit 0: SOP Bit 1: SOP' Bit 2: SOP'' Bit 3: SOP'_Debug Bit 4: SOP''_Debug R/W 00000b Bits Description Type Default |
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