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UPD360 датащи(PDF) 181 Page - Microchip Technology |
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UPD360 датащи(HTML) 181 Page - Microchip Technology |
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181 / 221 page ![]() 2016-2017 Microchip Technology Inc. DS00002084C-page 181 UPD360 12.5.7 PPC GENERAL CONFIGURATION 3 REGISTER (PPC_GENERAL_CFG3) 12.5.8 PPC CURRENT LIMIT REGISTER (PPC_CURRENT_LIMIT) This register controls the ILIM used by the port power switch. The contents of this register are retained in the Sleep state. Refer to Section 12.3.1, "Current Limiting," on page 172 for additional information. Note 12-1 When operating in Standalone DFP modes (UPD360-A/UPD360-B only), the default is defined by the PWR_CAP0 and PWR_CAP1 pins. Address: 0413h Size: 8 bits Bits Description Type Default 7 PIN_IGNORE When set, ignores the PWR_EN pin state (UPD360-A/UPD360-B only) when determining the Active mode selection and power state. R/W 0b 6:5 RESERVED RO - 4:3 PWR_STATE[1:0] This field indicates the current PPC power state as detailed below. These bits are set and cleared automatically as the power state changes. 00: Sleep 01: Detect 10: Active 11: Error R/W 00b 2 BOOST# Indicates that the IBUS current is >2.0A on VBUS. R/W 0b 1:0 RESERVED RO - Address: 0414h Size: 8 bits Bits Description Type Default 7:3 RESERVED RO - 2:0 ILIM_VBUS[2:0] Sets the ILIM value as follows: 000: 530 mA 001: 960 mA 010: 1070 mA 011: 1280 mA 100: 1600 mA 101: 2130 mA 110: 2670 mA 111: 3200 mA R/W Note 12-1 |
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