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FXPS7115D4 датащи(PDF) 58 Page - NXP Semiconductors |
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FXPS7115D4 датащи(HTML) 58 Page - NXP Semiconductors |
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58 / 72 page ![]() NXP Semiconductors FXPS7115D4 Digital absolute pressure sensor, 40 kPa to 115 kPa FXPS7115D4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 3 — 5 December 2019 58 / 72 Symbol Parameter Condition Min Typ Max Units tHOLD_IN MOSI data hold time (SCLK = 90 % of VCC to MOSI = 10/90 % of VCC) [1] — 10 — ns tHOLD_OUT Serial interface timing[3] MOSI data hold time (SCLK = 90 % of VCC to MISO = 10/90 % of VCC) [1] 0 — — ns tVALID Serial interface timing[3] SCLK low to data valid (SCLK = 10 % of VCC to MISO = 10/90 % of VCC) [1] — — 30 ns tLAG Serial interface timing[3] SCLK low to SS_B high (SCLK = 10 % of VCC to SS_B = 90 % of VCC) [1] — 60 — ns tDISABLE Serial interface timing[3] SS_B high to MISO disable (SS_B = 90 % of VCC to MISO = Hi Z) [1] — — 60 ns tSSN Serial interface timing[3] SS_B high to SS_B low (SS_B = 90 % of VCC to SS_B = 90 % of VCC) [1] — 500 — ns tSLKSS Serial interface timing[3] SCLK low to SS_B low (SCLK = 10 % of VCC to SS_B = 90 % of VCC) [1] — 50 — ns tSSCLK Serial interface timing[3] SS_B high to SCLK high (SS_B = 90 % of VCC to SCLK = 90 % of VCC) [1] — 50 — ns tLAT_SPI Data latency — — 1 ns Signal chain tSigChain Signal chain sample time [4] — 48 — μs fc0 Cutoff frequency, filter option #0, 4-pole [2] [4] — 800 — Hz fc1 PABS low-pass filter Cutoff frequency, filter option #1, 4-pole [2] [4] — 1000 — Hz tSigDelay Signal delay (sinc filter to output delay, excluding the PABS LPF) [4] — — 128 μs fPackage Package resonance frequency [4] 27.1 — — kHz Supply and support circuitry tVCC_POR VCC = VCCMIN to POR release [2] — — 1 ms tPOR_I2C/POR_SPI POR to first SPI command [4] 0.400 — 0.700 ms tPOR_DataValid POR to sensor data valid [4] — — 6 ms tRANGE_DataValid Reset recovery (all modes, excluding VCC voltage ramp time) DSP setting change to sensor data valid [2] — — 6 ms tSOFT_RESET_I2C Soft reset activation time, command complete to reset (no ACK follows) [4] — — 700 ns tSOFT_RESET_SPI Soft reset activation time, SS_B high to reset [4] — — 700 ns tCC_POR VCC undervoltage detection delay [4] — — 5 μs tUVOV_RCV Undervoltage/overvoltage recovery delay [4] — 100 — μs [1] Parameter verified by characterization. [2] Parameter verified by functional evaluation. [3] See Section 7.5.6, CMISO ≤ 80 pF, RMISO ≥ 10 kΩ [4] Functionality verified by modeling, simulation and/or design verification. |
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