FXPS7115D4 datasheet(47/72 Pages) NXP

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NXP Semiconductors

FXPS7115D4

Digital absolute pressure sensor, 40 kPa to 115 kPa

FXPS7115D4

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Product data sheet

Rev. 3 — 5 December 2019

47 / 72

required to always read the registers in sequence, SNSDATA0_L register first, followed

by the SNSDATA0_H register.

Table 77. SNSDATA0_L, SNSDATA0_H - sensor data #0 registers (addresses 62h, 63h) bit allocation

Location

Bit

Address

Symbol

62h

SNSDATA0_L

SNSDATA0_L[7:0]

63h

SNSDATA0_H

SNSDATA0_H[15:8]

Factory default

Access

7.7.19 SNSDATA1_L, SNSDATA1_H - sensor data #1 registers (address 64h, 65h)

The sensor data #1 registers are read-only registers that contain the 16-bit sensor

data. See Section 7.3.4.4 "Absolute pressure output data scaling equation" for details

regarding the 16-bit sensor data.

The SNSDATA1_H register value is latched on a read of the SNSDATA1_L register

value until the SNSDATA1_H register is read. To avoid data mismatch, the user is

required to always read the registers in sequence, SNSDATA1_L register first, followed

by the SNSDATA1_H register.

Table 78. SNSDATA1_L, SNSDATA1_H - sensor data #1 registers (address 64h, 65h) bit allocation

Location

Bit

Address

Symbol

64h

SNSDATA1_L

SNSDATA1_L[7:0]

65h

SNSDATA1_H

SNSDATA1_H[15:8]

Factory default

Access

7.7.20 SNSDATA0_TIMEx - time stamp registers (address 66h to 6Bh)

The sensor data 0 time stamp registers are read-only registers that contain a 48-bit time

stamp.

The value of the 48-bit free running timer register is copied to the sensor data 0 time

stamp registers each time sensor data 0 data is latched for transmission. The time stamp

is updated at the start of the sensor data 0 register value transmission for a register read

of the SNSDATA0_L register.

The time stamp register is organized to allow for optimized reading of the time stamp in

I2C automatic sensor data register read wrap-around mode as documented in Table 8.

The sensor data 0 time stamp registers are read-only registers that contain a 48-bit time

stamp.

The value of the 48-bit free running timer register is copied to the sensor data 0 time

stamp registers each time sensor data 0 data is latched for transmission via SPI.

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