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FXPS7115D4 датащи(PDF) 18 Page - NXP Semiconductors

номер детали FXPS7115D4
подробное описание детали  Digital absolute pressure sensor, 40 kPa to 115 kPa
PDF  72 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXPS7115D4 датащи(HTML) 18 Page - NXP Semiconductors

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NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
FXPS7115D4
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 3 — 5 December 2019
18 / 72
7.4.7 I2C timing diagram
aaa-029751
SDA
70 %
30 %
70 %
30 %
70 %
30 %
70 %
tr
tf
tr
9th clock
9th clock
... cont.
... cont.
tHIGH
tLOW
tVD;DAT
tBUF
tHD;DAT
tHD;STA
1 / fSCL
1st clock cycle
S
Sr
P
S
tSU;DAT
tSU;STO
tVD;ACK
tHD;STA
tSU;STA
tSP
tf
30 %
70 %
30 %
70 %
30 %
70 %
30 %
SCL
... SDA
... SCL
Figure 19. I2C timing diagram
7.5 Standard 32-bit SPI protocol
The device includes a standard SPI protocol requiring 32-bit data packets. The device
is a slave device and requires that the base clock value be low (CPOL = 0) with data
captured on the rising edge of the clock and data propagated on the falling edge of the
clock (CPHA = 0). The most significant bit is transferred first (MSB first). SPI transfers are
completed through a sequence of two phases. During the first phase, the command is
transmitted from the SPI master to the device. During the second phase, response data
is transmitted from the slave device. MOSI and SCLK transitions are ignored when SS_B
is not asserted.



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