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FXPS7115D4 датащи(PDF) 42 Page - NXP Semiconductors

номер детали FXPS7115D4
подробное описание детали  Digital absolute pressure sensor, 40 kPa to 115 kPa
PDF  72 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXPS7115D4 датащи(HTML) 42 Page - NXP Semiconductors

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NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
FXPS7115D4
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 3 — 5 December 2019
42 / 72
7.7.12.2 DSP_CFG_U1 - DSP user configuration #1 register (address 40h)
The DSP user configuration register #1 is a user programmable read/write register that
contains DSP-specific configuration information. This register is included in the read/write
array error detection.
Changes to this register reset the DSP data path. The contents of the SNSDATA_x
registers are not guaranteed until the DSP has completed initialization as specified in
Table 102. Reads of the SNSDATA_x registers and sensor data requests should be
prevented during this time.
Table 62. DSP_CFG_U1 - DSP user configuration #1 register (address 40h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
LPF[3:0]
reserved
reserved
USER_RANGE[1]
USER_RANGE[0]
Factory default
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 63. Low-pass filter selection bits (LPF[3:0])
LPF[3]
LPF[2]
LPF[1]
LPF[0]
Low Pass Filter Type
0
0
0
0
370 Hz, 2-Pole
0
0
0
1
400 Hz, 3 Pole
0
0
1
0
800 Hz, 4-Pole
0
1
0
0
1000 Hz, 4-Pole
0
1
0
1
reserved
0
1
1
0
reserved
0
1
1
1
reserved
1
0
0
0
reserved
1
x
x
x
reserved
Table 64. User range selection bits (USER_RANGE[1:0])
USER_RANGE[1]
USER_RANGE[0]
Absolute Pressure Range
Notes
0
0
reserved
For Internal use Only
0
1
reserved
For Internal use Only
1
0
reserved
For Internal use Only
1
1
reserved
For Internal use Only
7.7.12.3 DSP_CFG_U4 - DSP user configuration #4 register (address 43h)
The DSP user configuration register #4 is a user programmable read/write register that
contains DSP-specific configuration information. This register is included in the read/write
array error detection.
Table 65. DSP_CFG_U4 - DSP user configuration #4 register (address 43h) bit allocation
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
reserved
reserved
reserved
reserved
INT_OUT
reserved
reserved
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W



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