FXPS7115D4 datasheet(46/72 Pages) NXP

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NXP Semiconductors

FXPS7115D4

Digital absolute pressure sensor, 40 kPa to 115 kPa

FXPS7115D4

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Product data sheet

Rev. 3 — 5 December 2019

46 / 72

7.7.16 DSP_STAT - DSP-specific status register (address 60h)

The DSP status register is a read-only register that contains sensor data-specific status

information.

Table 74. DSP_STAT - DSP-specific status register (address 60h) bit allocation

Bit

Symbol

reserved

PABS_HIGH

PABS_LOW

reserved

ST_INCMPLT

ST_ACTIVE

CM_ERROR

ST_ERROR

Factory default

Access

Table 75. DSP_STAT - DSP-specific status register (address 60h) bit description

Bit

Symbol

Description

PABS_HIGH

The absolute pressure out-of-range high status bit is set if the absolute pressure exceeds the absolute pressure out-

of-range high limit. The PABS_HIGH bit is cleared on a read of the DSP_STAT register through any communication

interface or on a data transmission that includes the error in the status field.

PABS_LOW

The absolute pressure out-of-range low status bit is set if the absolute pressure exceeds the absolute pressure out-

of-range low limit. The PABS_LOW bit is cleared on a read of the DSP_STAT register through any communication

interface or on a data transmission that includes the error in the status field.

ST_INCMPLT

The self-test incomplete bit is set after a device reset and is only cleared when one of the analog or digital self-test

modes is enabled in the ST_CTRL register (ST_CTRL[3] = '1' | ST_CTRL[2] = '1' | | ST_CTRL[1] =

'1' | | ST_CTRL[0] = '1').

0 — An analog or digital self-test has been activated since the last reset.

1 — No analog or digital self-test has been activated since the last reset.

ST_ACTIVE

The self-test active bit is set if any self-test mode is currently active. The self-test active bit is cleared when no self-test

mode is active.

ST_ACTIVE= ST_CTRL[3] | ST_CTRL[2] | ST_CTRL[1] | ST_CTRL[0]

CM_ERROR

The absolute pressure common mode error status bit is set if the common mode value of the analog front end exceeds

predetermined limits. The CM_ERROR bit is cleared on a read of the DSP_STAT register through any communication

interface or on a data transmission that includes the error in the status field.

ST_ERROR

The self-test error flag is set if an internal self-test fails as described in Section 7.3.2. This bit can only be cleared by a

device reset.

7.7.17 DEVSTAT_COPY - device status copy register (address 61h)

The device status copy register is a read-only register that contains a copy of the device

status information contained in the DEVSTAT register. See Section 7.7.2.1 "DEVSTAT

- device status register (address 01h)" for details regarding the DEVSTAT register

contents. A read of the DEVSTAT_COPY register has the same effect as a read of the

DEVSTAT register.

Table 76. DEVSTAT_COPY - device status copy register (address 61h) bit allocation

Bit

Symbol

DSP_ERR

reserved

COMM_ERR

MEMTEMP_ERR SUPPLY_ERR

TESTMODE

DEVRES

DEVINIT

Reset

Access

7.7.18 SNSDATA0_L, SNSDATA0_H - sensor data #0 registers (address 62h, 63h)

The sensor data #0 registers are read-only registers that contain the 16-bit sensor

data. See Section 7.3.4.4 "Absolute pressure output data scaling equation" for details

regarding the 16-bit sensor data.

The SNSDATA0_H register value is latched on a read of the SNSDATA0_L register

value until the SNSDATA0_H register is read. To avoid data mismatch, the user is

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