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CS7620 датащи(PDF) 44 Page - Cirrus Logic

номер детали CS7620
подробное описание детали  CCD IMAGER ANALOG PROCESSOR
PDF  70 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS7620 датащи(HTML) 44 Page - Cirrus Logic

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CS7620
44
DS301PP2
4.26
Timing Control - Extra Lines of Exposure in Low Resolution Mode (LSBs)
Default = 00h; Read/Write (address 24h)
4.27
Timing Control - Vsync Mode, Lines of Exposure in Low Resolution Mode (MSBs)
Default = 01h; Read/Write (address 25h)
Bit Number
765432
10
Bit Name
n_extra7
n_extra6
n_extra5
n_extra4
n_extra3
n_extra2
n_extra1
n_extra0
Default
0
0000000
Bit
Mnemonic
Function
7
n_extra7
Extra Lines: This allows for increased exposure time while in low resolution
mode.
In low resolution mode, the CS7620 continuously outputs data on a frame by
frame basis; so it can drive a LCD panel in a video mode. In this mode the
CS7620 ignores the expose signal. The default expose time is equivalent to
262 line times (see registers 25h and 26h, n_int).
N_extra provides a way to increase the exposure time beyond the one which
is set by register n_int (25h and 26h). The value of n_extra corresponds to the
number of line times.
6
n_extra6
5
n_extra5
4
n_extra4
3
n_extra3
2
n_extra2
1
n_extra1
0
n_extra0
Bit Number
765432
10
Bit Name
Reserved
vsync_md
lowres_sen3
lowres_sen2
lowres_sen1
lowres_sen0
n_int8
Default
--
000001
Bit Mnemonic
Function
7:6
-
Reserved
5
vsync_md
Vertical Sync: Vsync_md, will switch the RD_OUT pin to output a vertical sync signal on this
pin when the vsync_md register is set to 1. The default is 0 which outputs the RD_OUT signal
(see Figures 21 and 22).



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