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CS7620 датащи(PDF) 12 Page - Cirrus Logic |
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CS7620 датащи(HTML) 12 Page - Cirrus Logic |
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12 / 70 page ![]() CS7620 12 DS301PP2 The open-loop transfer function of the black level adjustment loop is blk_gain = 1, 2, 4, or 8 where blk_gain is programmable through a register and n = # of black pixels during clamp time, which is also programmable. The value of Kxn will deter- mine the open-loop gain of the system. The settling time for the loop can be calculated using the fol- lowing formula: For offset range=1 (reg 06h, bit 0) For offset range =0 During fixed gain mode the time constant is a little different. In order to achieve no ringing in the settling use, for offset range = 1, and for offset range = 0. The 9 MSBs of the black level accumulator can be read or written through a register. If written, the LSBs are set to zero. The black level is set to “8” in a 10-bit digital output representation. In a 13-bit representation, it is set to “64.” The power-up de- fault value in the accumulator is at mid level. Also note that the black level adjust loop can be disabled. In addition, the black level can be pro- grammed through the serial port. 3.2 Gain Adjust Block In order to increase the dynamic range of the ADC, a variable gain, whose value is determined by the signal level, is applied to each pixel. This allows for 13 bits of dynamic range and 10 bits of resolu- tion after accounting for the significance of the ADC output bits. The gain applied in the analog is illustrated in the transfer curve in Figure 7. Once the signal is digitized, the gain adjust block uses the gain information for a given pixel word and shifts its bits accordingly. For example, using the default full scale level of 1.07V, if Vin = 0.3 V, the VGA would choose a gain of 2X so the ADC input is 0.6 V. The 10-bit output of the ADC (with no black level) is (0.6/1.07) × 1024 = 574, or “1000111110.” in binary. The gain adjust block will take this value For a fixed gain of 1: For a fixed gain of 2: Hz () Kn × z1 – ------------- = K 1 256 ---------blk_gain = τ 1 1nK – () ln --------------------------- – 1 fu ----- = τ 1 1 nK 2 ------- – ln ---------------------------- – 1 fu ----- = τ 1 1 nK 8 ------- – ln ---------------------------- – 1 fu ----- = τ 1 1 nK 4 ------- – ln ---------------------------- – 1 fu ----- = For a fixed gain of 4: For a fixed gain of 8: τ 1 1 nK 2 ------- – ln ---------------------------- – 1 fu ----- = τ 1 1nK – () ln --------------------------- – 1 fu ----- = n K ---- 1 ≤ n 2K ------- 1 ≤ |
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