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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DSP56857 датащи(PDF) 145 Page - Freescale Semiconductor, Inc |
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DSP56857 датащи(HTML) 145 Page - Freescale Semiconductor, Inc |
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145 / 662 page  Timing Specifications External Memory Interface (EMI), Rev. 4 Freescale Semiconductor 5-19 Figure 5-13. External Write Cycle with WWS = 1, WWSH = 0, and WWSS = 0 5.7.2.1 Write Setup and Hold Timing Since the timing of the strobes is different when WWS = 0 than it is when WWS > 0, two sets of timing diagrams are illustrated in Figure 5-14, Figure 5-15, Figure 5-16, and Figure 5-17. 5.7.2.2 WWS = 0 Although most memory devices require a zero setup and hold time, there are some peripheral devices where a setup/hold time is required. The WWSS and WWSH field of the CSTC register provides the ability to allow for a write setup and/or hold time requirement as shown in Figure 5-14 and Figure 5-15. tCWH tCWL tCWL tCSV tWDO tWHZ tAV tWAC tWC IDLE Write (WWS = 1) Write (WWS = 1) IDLE Write (WWS = 1) tC tWRL tAVW tDW tAVW tDH tDW tWRL tAVW int_sys_clk(core) int_delay_SEMI_clk A[23:0] RD = OE D[16:0] CS2 WR tAV tWDE tCSV tCWH tCSL tDH tCWH tWRH tWHZ Time added to Figure 5-12 by setting WWS = 1 tWDO |
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