S70FS01GS datasheet(4/141 Pages) CYPRESS

4 / 141 page

S70FS01GS

Document Number: 002-03833 Rev. *C

Page 4 of 141

Notes:

Only 128Mb/256Mb density FL-S devices have 4KB parameter sector option.

512Mb/1Gb FL-S devices support 256KB sector only.

Refer to individual data sheets for further details.

1.2.2

Known Differences from Prior Generations

1.2.2.1

Error Reporting

The FS-S and FL-S families have error reporting status bits for program and erase operations. These can be set when there is an

internal failure to program or erase, or when there is an attempt to program or erase a protected sector. In these cases the program

or erase operation did not complete as requested by the command. The P_ERR or E_ERR bits and the WIP bit will be set to and

remain 1 in SR1V. The clear status register command must be sent to clear the errors and return the device to standby state.

1.2.2.2

Secure Silicon Region (OTP)

The FS-S size and format (address map) of the One Time Program area is different from FL-K and FL-P generations. The method

for protecting each portion of the OTP area is different. For additional details see Secure Silicon Region (OTP) on page 62.

1.2.2.3

Configuration Register Freeze Bit

The configuration register-1 Freeze Bit CR1V[0], locks the state of the Block Protection bits (SR1NV[4:2] & SR1V[4:2]), TBPARM_O

bit (CR1NV[2]), and TBPROT_O bit (CR1NV[5]), as in prior generations. In the FS-S and FL-S families the Freeze Bit also locks the

state of the configuration register-1 BPNV_O bit (CR1NV[3]), and the Secure Silicon Region (OTP) area.

1.2.2.4

Sector Erase Commands

The command for erasing a 4KBytes sector is supported only for use on 4KBytes parameter sectors at the top or bottom of the FS-

S device address space.

The command for erasing an 8KByte area (two 4KBytes sectors) is not supported.

The command for erasing a 32KByte area (eight 4KBytes sectors) is not supported.

1.2.2.5

Deep Power Down

A Deep Power Down (DPD) function is supported in the FS-S family devices.

1.2.2.6

WRR Single Register Write

In some legacy SPI devices, a Write Registers (WRR) command with only one data byte would update Status Register 1 and clear

some bits in Configuration Register 1, including the Quad mode bit. This could result in unintended exit from Quad mode. The FS-S

Family only updates Status Register 1 when a single data byte is provided. The Configuration Register 1 is not modified in this case.

1.2.2.7

Hold Input Not Supported

In some legacy SPI devices, the IO3 input has an alternate function as a HOLD# input used to pause information transfer without

stopping the serial clock. This function is not supported in the FS-S family.

Advanced Sector Protection

Yes

Auto Boot Mode

Yes

Erase Suspend/Resume

Yes

Program Suspend/Resume

Yes

Operating Temperature

-40°C to +85°C / +105°C / +125°C

-40°C to +85°C / +105°C

Table 1.1

Cypress SPI Families Comparison (Continued)

Parameter

FS-S

FL-S

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