VSC7212 datasheet(29/34 Pages) VITESSE

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VITESSE

SEMICONDUCTOR CORPORATION

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Data Sheet

VSC7212

Gigabit Interconnect Chip

G52268-0, Rev 3.3

Page 29

04/10/01

Tel: (800)-VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

Table 16: Pin Identification

Name

I/O

Type

Pin Description

99,98,97

96,95,91

90,89

T0, T1, T2

T3, T4, T5

T6, T7

TTL

Transmit data, synchronous to REFCLK or TBC.

C/D

TTL

Control/Data. If KCHAR=C/D=LOW, then T(7:0) is used to generate

transmit data. If KCHAR=C/D=HIGH then special Kxx.x characters are

transmitted based upon the value of T(7:0). If KCHAR=LOW and C/D

=HIGH, IDLE characters are transmitted.

When ENDEC=LOW, this is equivalent to data bit T8.

WSEN

TTL

Word Sync ENable. Asserted HIGH for one cycle to initiate transmission of

the Word Sync Sequence as defined in Figure 5 and related text.

When ENDEC=LOW, this is equivalent to data bit T9.

TBC

TTL

Transmit Byte Clock. Optional input data timing reference for T(7:0),

WSEN and C/D.

KCHAR

TTL

Special Kxx.x CHARacter Enable. When C/D is HIGH, KCHAR controls

data sent to the transmitter. When LOW, IDLE characters are sent. When

HIGH, Kxx.x special characters are sent as encoded on T(7:0). This is

intended to be a static input and cannot be changed on a cycle-by-cycle

basis.

When ENDEC=LOW, this is equivalent to ENCDET. A HIGH enables

comma detection and alignment. A LOW disables both.

TMODE0

TMODE1

TMODE2

TTL

Transmit Input Data Timing MODE. Determines the timing reference for

T(7:0), WSEN and C/D as defined in Table 1.

TBERR

TTL

Transmit Buffer ERRor. When HIGH indicates that the elastic limit of the

transmit input skew buffer was exceeded, output timing is same as R(7:0). A

LOW indicates correct reception of the 256-byte incrementing pattern in

BIST mode.

PTX+

PTX-

OPECL

Primary Differential Serial TX Output. These pins output serialized

transmit data when PTXEN is HIGH. AC-coupling is recommended.

RTX+

RTX-

OPECL

Redundant Differential Serial TX output. These pins output serialized

transmit data when RTXEN is HIGH. AC-coupling is recommended.

PTXEN

TTL

Primary TX Output ENable. When HIGH, PTX+/- is active, when LOW

PTX+/- is powered down and the outputs are un-driven.

RTXEN

TTL

Redundant TX Output ENable. When HIGH RTX+/- is active, when LOW

RTX+/- is powered down and the outputs are un-driven.

46,48,52

53,55,56

58,60

R0, R1, R2

R3, R4, R5

R6, R7

TTL

Receive Data. Synchronous to RCLK/RCLKN or REFCLK as selected by

RMODE(1:0).

IDLE

TTL

IDLE Detect. When HIGH, an IDLE character has been detected by the

decoder and is on R(7:0)

When ENDEC=LOW, this is equivalent to COMDET.

KCH

TTL

Kxx.x CHaracter Detect. When HIGH, a special Kxx.x character has been

detected by the decoder and is on R(7:0).

When ENDEC=LOW, this is equivalent to data bit R8.

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