ESE

SEMICONDUCTOR CORPORATION

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Data Sheet

VSC7212

Gigabit Interconnect Chip

Page 8

G52268-0, Rev 3.3

04/10/01

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Tel: (800)-VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

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Clock and Data Recovery

The receiver has a Clock Recovery Unit (CRU) which accepts the selected serial input source, extracts the

high-speed clock and retimes the data. The CRU is monolithic. The CRU automatically locks on data and if the

data is not present, will automatically lock to the REFCLK. This maintains a very well-behaved recovered

clock, RCLK/RCLKN which does not contain any slivers and will operate at a frequency of the REFCLK

reference +/- 200 ppm. The use of an external Lock-to-Reference pin is not needed.

The Clock Recovery Unit must perform bit synchronization which occurs when the CRU locks onto and

properly samples the incoming serial data as described in the previous paragraph. When the CRU is not locked

onto the serial data, the 10-bit data out of the decoder is invalid which results in numerous 8B/10B decoding

errors or disparity errors. When the link is disturbed (e.g., the cable is disconnected or the serial data source is

switched), the CRU will require a certain amount of time to lock onto data, which is specified in the AC Timing

Specification for “Data Acquisition Lock Time.”

Deserializer and Character Alignment

The retimed serial data stream is converted into 10-bit characters by the deserializer. A special 7-bit

“Comma” pattern (‘0011111xxx’ or ‘1100000xxx’) is recognized by the receiver and allows it to identify the

10-bit character boundary. Note that this pattern is found in three special characters, K28.1, K28.5 and K28.7.

However, K28.5 is chosen as the unique IDLE character. Only K28.1 and K28.5 should be used in normal

operation. The K28.7 character should be reserved for test and characterization use.

Character alignment occurs when the deserializer synchronizes the 10-bit character framing boundary to a

“Comma” pattern in the incoming serial data stream. If the receiver identifies a “Comma” pattern in the

incoming data stream which is misaligned to the current framing boundary the receiver will re-synchronize the

recovered data in order to align the data to the new “Comma” pattern. Re-synchronization ensures that the

“Comma” character is output on the internal 10-bit bus so that bits 0 through 9 equal ‘0011111xxx’ or

‘1100000xxx’. If the “Comma” pattern is aligned with the current framing boundary, then re-synchronization

will not change the current alignment. Re-synchronization is always enabled and cannot be turned off when

ENDEC is HIGH. After character re-synchronization the VSC7212 ensures that within a link, the 8-bit data sent

to the transmitting VSC7212 will be recovered by the receiving VSC7212 in the same bit locations as the

transmitter (i.e. T(7:0) = R(7:0)). When ENDEC is LOW, “Comma” detection and alignment are enabled only if

KCHAR is HIGH.

10B/8B Decoder

The 10-bit character from the deserializer is decoded in the 10B/8B decoder, which outputs the 8B data byte

and three bits of status information. If the 10-bit character does not match any valid value, an Out-of-Band Error

is generated which is output on the receiver status bus. Similarly, if the running disparity of the character does

not match the expected value, a Disparity Error is generated. The decoder also reports when a K-character is

received, and distinguishes the K28.5 (IDLE) character from other K-characters. This status information is

combined with LOS State Machine status and FIFO error status, to produce the prioritized per-character link

status output information (see Table 7).