ESE

SEMICONDUCTOR CORPORATION

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Data Sheet

VSC7212

Gigabit Interconnect Chip

Page 26

G52268-0, Rev 3.3

04/10/01

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800)-VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

DC Characteristics

Parameters

Description

Min.

Typ

Max

Units

Conditions

TTL Outputs (R(7:0), KCH, IDLE, ERR, RCLK/RCLKN, TBERR, PSDET, RSDET, WSO, REFOUT)

TTL output HIGH voltage

2.4

——

TTL output LOW voltage

——

0.5

V

TTL output leakage current

——

50

µA

When set to high-impedance

state through JTAG.

TTL Inputs (TBC, T(7:0), C/D, WSEN, KCHAR, BIST, LBEN(1:0), TMODE(2:0), RMODE(1:0), DUAL, PTXEN,

RTXEN, RXP/R, RESETN, ENDEC, WSI, FLOCK, TRSTN, TDI, TDO, TMS, TCK)

TTL input HIGH voltage

2.0

——

V

TTL input LOW voltage

0

—

0.8

V

TTL input HIGH current

—

50

500

µA

TTL input LOW current

——

-1000

µA

PECL Inputs (REFCLKP/REFCLKN)

PECL input HIGH voltage

1.1

—

0.7

V

PECL input LOW voltage

2.0

—

1.5

V

PECL input HIGH current

——

200

µA

PECL input LOW current

- 50

——

µA

∆V

IN

PECL input differential peak-to-

peak voltage swing

200

——

mV

a

a. Single-ended measurement results are quoted here. Differential techniques used in Fibre Channel would yield values that are

twice the magnitude. See diagram below.

PECL input common-mode

voltage

1.5

—

0.7

V

REFCLKP/REFCLKN internal

input bias voltage

—

2

—

PECL Outputs (PTX+/-, RTX+/-)

∆V

OUT

PECL differential peak-to-peak

output voltage swing

500

—

1100

mV

| PTX+ - PTX- |

50

Ω to V

PECL Inputs (PRX+/-, RRX+/-)

∆V

IN

PECL differential peak-to-peak

input voltage swing

200

—

1300

mV

| PRX+ - PRX- |

Miscellaneous

Power supply voltage

3.14

—

3.47

V

3.3V + 5%

Power dissipation

—

0.65

1.2

W

Maximum at 3.47V, at 1.3Gb.s,

typical at 3.3V, outputs open,

RTX disabled.

Supply current

—

200

345

mA

Tx

+

∆ V

OUT