SC16C752B datasheet(19/47 Pages) PHILIPS

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Philips Semiconductors

SC16C752B

5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs

Product data

Rev. 03 — 14 December 2004

19 of 47

9397 750 14443

Each register is selected using address lines A0, A1, A2, and in some cases, bits

from other registers. The programming combinations for register selection are shown

in Table 9.

[1]

MCR[7] can only be modiﬁed when EFR[4] is set.

[2]

Accessed by a combination of address pins and register bits.

[3]

Accessible only when LCR[7] is logic 1.

[4]

Accessible only when LCR is set to 10111111 (xBF).

[5]

Accessible only when EFR[4] = 1 and MCR[6] = 1, i.e., EFR[4] and MCR[6] are read/write enables.

[6]

Accessible only when CSA or CSB = 0, MCR[2] = 1, and loop-back is disabled (MCR[4] = 0).

Fig 13. Crystal oscillator connections.

002aaa586

1.8432 MHz

22 pF

47 pF

1.8432 MHz

22 pF

33 pF

1.5 k

Ω

Table 9:

Read mode

Write mode

receive holding register (RHR)

transmit holding register (THR)

interrupt enable register (IER)

interrupt enable register

interrupt identiﬁcation register (IIR)

FIFO control register (FCR)

line control register (LCR)

line control register

modem control register (MCR)[1]

modem control register[1]

line status register (LSR)

modem status register (MSR)

scratchpad register (SPR)

scratchpad register

divisor latch LSB (DLL)[2], [3]

divisor latch LSB[2], [3]

divisor latch MSB (DLH)[2], [3]

divisor latch MSB[2], [3]

enhanced feature register (EFR)[2], [4]

enhanced feature register[2], [4]

Xon1 word[2], [4]

Xon2 word[2], [4]

Xoff1 word[2], [4]

Xoff2 word[2], [4]

transmission control register (TCR)[2], [5] transmission control register[2], [5]

trigger level register (TLR)[2], [5]

trigger level register[2], [5]

FIFO ready register[2], [6]

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